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authorPankaj Bharadiya <pankaj.bharadiya@ti.com>2012-09-13 09:38:16 +0000
committerTom Rini <trini@ti.com>2012-10-23 08:33:17 -0700
commit3f0be8ea9217311ec41156fd89e3e23a0308f3b2 (patch)
treeba21021eefcd5ca701b0b689b272f06689df633b /include/fis.h
parent39826f09978a0a7070999acc15babf88f03e4051 (diff)
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USB: musb_udc: Make musb_peri_rx_ep check for MUSB_RXCSR_RXPKTRDY
The endpoint rx count register value will be zero if it is read before receive packet ready bit (PERI_RXCSR:RXPKTRDY) is set. Check for the receive packet ready bit (PERI_RXCSR:RXPKTRDY) before reading endpoint rx count register. Proceed with rx count read and FIFO read only if RXPKTRDY bit is set. Signed-off-by: Pankaj Bharadiya <pankaj.bharadiya@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
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