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| author | Simon Glass <sjg@chromium.org> | 2014-11-12 22:42:21 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-11-21 07:34:14 +0100 |
| commit | 77f9b1fb6244878ab4aab342a814880d17253b75 (patch) | |
| tree | 9aec72ab40799b06370e588d8063b0dfdbc9d755 /include/fdtdec.h | |
| parent | 94060ff278e3ed4d91e4605701231d194a5013a3 (diff) | |
| download | u-boot-imx-77f9b1fb6244878ab4aab342a814880d17253b75.zip u-boot-imx-77f9b1fb6244878ab4aab342a814880d17253b75.tar.gz u-boot-imx-77f9b1fb6244878ab4aab342a814880d17253b75.tar.bz2 | |
x86: ivybridge: Perform Intel microcode update on boot
Microcode updates are stored in the device tree. Work through these and
apply any that are needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/fdtdec.h')
| -rw-r--r-- | include/fdtdec.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/fdtdec.h b/include/fdtdec.h index 6b40006..3bd60b7 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -118,6 +118,7 @@ enum fdt_compat_id { COMPAT_SAMSUNG_EXYNOS_SYSMMU, /* Exynos sysmmu */ COMPAT_PARADE_PS8625, /* Parade PS8622 EDP->LVDS bridge */ COMPAT_INTEL_LPC, /* Intel Low Pin Count I/F */ + COMPAT_INTEL_MICROCODE, /* Intel microcode update */ COMPAT_COUNT, }; |