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| author | Stephen Warren <swarren@nvidia.com> | 2016-05-12 12:11:23 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2016-05-31 11:22:59 -0700 |
| commit | 39f633320c569a5d975d2d051ff2683db27bd021 (patch) | |
| tree | 675be1ed00fe4a4e47c851da627b15681e2cda05 /include/fdtdec.h | |
| parent | 074a1fdd27953aacb59346c83baaf443335ea04e (diff) | |
| download | u-boot-imx-39f633320c569a5d975d2d051ff2683db27bd021.zip u-boot-imx-39f633320c569a5d975d2d051ff2683db27bd021.tar.gz u-boot-imx-39f633320c569a5d975d2d051ff2683db27bd021.tar.bz2 | |
mmc: tegra: add basic Tegra186 support
Tegra186's MMC controller needs to be explicitly identified. Add another
compatible value for it.
Tegra186 will use an entirely different clock/reset control mechanism to
existing chips, and will use standard clock/reset APIs rather than the
existing Tegra-specific custom APIs. The driver support for that isn't
ready yet, so simply disable all clock/reset usage if compiling for
Tegra186. This must happen at compile time rather than run-time since the
custom APIs won't even be compiled in on Tegra186. In the long term, the
plan would be to convert the existing custom APIs to standard APIs and get
rid of the ifdefs completely.
The system's main eMMC will work without any clock/reset support, since
the firmware will have already initialized the controller in order to
load U-Boot. Hence the driver is useful even in this apparently crippled
state.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'include/fdtdec.h')
| -rw-r--r-- | include/fdtdec.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/fdtdec.h b/include/fdtdec.h index 37d482a..54e3d81 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -123,6 +123,7 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA124_SOR, /* Tegra 124 Serial Output Resource */ COMPAT_NVIDIA_TEGRA124_PMC, /* Tegra 124 power mgmt controller */ COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */ + COMPAT_NVIDIA_TEGRA186_SDMMC, /* Tegra186 SDMMC controller */ COMPAT_NVIDIA_TEGRA210_SDMMC, /* Tegra210 SDMMC controller */ COMPAT_NVIDIA_TEGRA124_SDMMC, /* Tegra124 SDMMC controller */ COMPAT_NVIDIA_TEGRA30_SDMMC, /* Tegra30 SDMMC controller */ |