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authorJaehoon Chung <jh80.chung@samsung.com>2014-05-16 13:59:55 +0900
committerMinkyu Kang <mk7.kang@samsung.com>2014-05-16 14:54:26 +0900
commit045bdcd0b2ff02effef09d945cee685b88ec521d (patch)
treebbca9ea38671b91e4a217d1cba7ad69d3f7604dc /include/dwmmc.h
parentd22e3d46a918bde2e6d3bc3f5782548d5ed75358 (diff)
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mmc: dw_mmc: support the DDR mode
Support the DDR mode at dw-mmc controller Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'include/dwmmc.h')
-rw-r--r--include/dwmmc.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 14c7db8..b67f11b 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -123,6 +123,9 @@
#define DWMCI_BMOD_IDMAC_FB (1 << 1)
#define DWMCI_BMOD_IDMAC_EN (1 << 7)
+/* UHS register */
+#define DWMCI_DDR_MODE (1 << 16)
+
/* quirks */
#define DWMCI_QUIRK_DISABLE_SMU (1 << 0)