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authorRobby Cai <R63905@freescale.com>2010-11-18 17:36:30 +0800
committerTerry Lv <r65388@freescale.com>2010-12-01 18:02:08 +0800
commit2fc4fafc0d81f9d5b598936509a2b973b2d6bdff (patch)
tree0b0ecc28a6cff798116c2183f7cc195f76aac75b /include/dtt.h
parent48457509cdc009fddcdad859f3d5fc9a75eb9024 (diff)
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ENGR12345678 Change ddr write delay in the PHY
Total 5 registers: 0x1400023c/244/24c/254/25c: from 0x000a1401 to 0x000a0b01 Without this patch, kernel on RDP board with Elpida DDR is not able to boot, or not stable. Signed-off-by: Robby Cai <R63905@freescale.com>
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