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authorThierry Reding <treding@nvidia.com>2015-08-20 11:42:23 +0200
committerTom Warren <twarren@nvidia.com>2015-09-16 16:10:23 -0700
commitf8007235a0a50cd3538b47d1fd02e96e1f64a285 (patch)
tree188772ea4ed63a14b3d43deac09d621b5a31424a /include/ds1722.h
parentca2d6dc25e9bbe623e3cf1467fa0b3ce4a7b70a8 (diff)
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p2571: Remove hard-coded counter frequency
The counter frequency is derived from clk_m on Tegra, but that clock can be configured by the primary bootloader to run at the same frequency as the oscillator (38.4 MHz on Tegra210) or a divided down frequency (most typically 19.2 MHz). Remove the hard-coded frequency and allow the timer setup code to query the correct value at runtime. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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