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authorChandan Nath <chandan.nath@ti.com>2012-01-09 20:38:56 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-01-16 08:40:11 +0100
commitfb072a3ead8cc9f4a5e236a4b424e4df16f5e5ef (patch)
tree012405e9b81d9f9a17f0cefc19a4053f439d2ca5 /include/dm9161.h
parentf16da7466fc46109ba8922069cef521eb068f9a2 (diff)
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ARM:AM33XX: Fix ddr and timer register offset
This patch is added to update incorrect ddr and timer register offset. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
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