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author | york <yorksun@freescale.com> | 2010-07-02 22:25:55 +0000 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2010-07-26 13:16:10 -0500 |
commit | 9490ff48648d969caeb70dbc6e506175f8699617 (patch) | |
tree | 19d3caa8fa415392cb93e304c925a3dc5a58cbe5 /include/ddr_spd.h | |
parent | 7fd101c97b58dab7b0bd87f30c3dedb0db21d15f (diff) | |
download | u-boot-imx-9490ff48648d969caeb70dbc6e506175f8699617.zip u-boot-imx-9490ff48648d969caeb70dbc6e506175f8699617.tar.gz u-boot-imx-9490ff48648d969caeb70dbc6e506175f8699617.tar.bz2 |
powerpc/8xxx: Enable DDR3 RDIMM support
Enabled registered DIMMs using data from SPD. RDIMMs have registers
which need to be configured before using. The register configuration
words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software
should read those RCWs and put into DDR controller before initialization.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/ddr_spd.h')
-rw-r--r-- | include/ddr_spd.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/ddr_spd.h b/include/ddr_spd.h index 10402c5..710e528 100644 --- a/include/ddr_spd.h +++ b/include/ddr_spd.h @@ -243,6 +243,20 @@ typedef struct ddr3_spd_eeprom_s { unsigned char mod_thickness; /* 62 (Registered) Reference Raw Card Used */ unsigned char ref_raw_card; + /* 63 DIMM Module Attributes */ + unsigned char modu_attr; + /* 64 RDIMM Thermal Heat Spreader Solution */ + unsigned char thermal; + /* 65 Register Manufacturer ID Code, Least Significant Byte */ + unsigned char reg_id_lo; + /* 66 Register Manufacturer ID Code, Most Significant Byte */ + unsigned char reg_id_hi; + /* 67 Register Revision Number */ + unsigned char reg_rev; + /* 68 Register Type */ + unsigned char reg_type; + /* 69-76 RC1,3,5...15 (MS Nibble) / RC0,2,4...14 (LS Nibble) */ + unsigned char rcw[8]; } registered; unsigned char uc[57]; /* 60-116 Module-Specific Section */ } mod_section; |