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| author | Ebony Zhu <b45385@freescale.com> | 2014-04-25 18:38:44 -0500 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-05-16 16:24:05 -0500 |
| commit | 477c894ff475be9886bd936fa8eeef7bfe862161 (patch) | |
| tree | 1bd9228d9c5bafa7c239be0823eb7b3118df78da /include/ddr_spd.h | |
| parent | ffc8667acf5c01e2b1ab7b7bb640ddaf2d1f2784 (diff) | |
| download | u-boot-imx-477c894ff475be9886bd936fa8eeef7bfe862161.zip u-boot-imx-477c894ff475be9886bd936fa8eeef7bfe862161.tar.gz u-boot-imx-477c894ff475be9886bd936fa8eeef7bfe862161.tar.bz2 | |
board/freescale: Move CRC32 offset in NXID v1 data format
According to AN3638, CRC of NXID v1 is at the end of the
256-byte I2C memory. The wrong CRC32 offset prevents Uboot
from reading system information from EEPROM. No NXID v0 is
being used on Freescale boards.
Signed-off-by: Ebony Zhu <b45385@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/ddr_spd.h')
0 files changed, 0 insertions, 0 deletions