Merge branch 'master' of git://git.denx.de/u-boot-arm

* 'master' of git://git.denx.de/u-boot-arm:
  drivers/rtc: add Marvell Integrated RTC
  Armada100: Add Board Support for Marvell GuruPlug-Display
  Armada100: MFP macro naming correction
  arm: auto gen asm-offsets.h for mb86r0x
  spear: fix build errors for spear3xx/spear600 platforms
  cosmetic: arm: lib/board.c: Coding Style cleanup
  ARM: versatile: fix board support
  SMDKV310: Enable device tree support
  SMDKV310: MMC_SPL: Fix building when using "make O="
  arm: a320: enable tagged list support
  arm: a320: fix multiline comment style
  ARMv7: u8500_href: Add missing header to fix compiler warning
  Removed unused define, CONFIG_ARMV7.
  avr32: add grasshopper (ICnova AP7000) board
  AT91/SPI: fix atmel_dataflash_spi.c to allow building without warnings
  MAKEALL: remove AT91 boards that are in boards.cfg
  AT91: Makes AT91SAM9263-EK build correctly against u-boot-atmel/master
  AT91: Makes AT91SAM9263 SoC build correctly against u-boot-atmel/master
  AT91: Board fix for AT91SAM9261-EK
  AT91: SoC fix at91sam9261_matrix.h
  AT91: Makes AT91SAM9RL-EK build correctly against u-boot-atmel/master
  AT91: Makes AT91SAM9RL SoC build correctly against u-boot-atmel/master
  AT91: change common at91sam9261 files to compile with new scheme
  AT91: fix mistake in at91sam9260_devices.c(spi1_hw_init)
  a/a/c/arm920t/at91/reset.c: drop obsolete CONFIG_AT91RM9200_USART
  README: fix arm920t/at91 path
  net/eth.c: drop obsolete at91rm9200 support
  README.at91-soc: remove AT91(RM9200) joining notice
  a/a/c/arm920t/cpu.c: remove CONFIG_AT91_LEGACY warning
  MAKEALL: remove obsolete at91rm9200 soc
  ARM: remove obsolete at91rm9200
  omap4: clock init support for omap4460
  omap4: support TPS programming
  omap: reuse omap3 gpio support in omap4
  omap4: sdram init changes for omap4460
  omap4: add omap4460 revision detection
  mkimage: Add OMAP boot image support
  omap: add MMC and FAT support to SPL
  omap: add basic SPL support
  armv7: start.S: fixes and enhancements for SPL
  omap4: automatic sdram detection
  omap4: calculate EMIF register values
  omap4: add sdram init support
  omap4: add clock support
  omap4: add OMAP4430 revision check
  omap4: cleanup pin mux data
  omap4: utility function to identify the context of hw init
  DA8xx: fix LPSC constants
  DA8xx: switch an enum to defines for consistency
  DA8xx: add MMC/SD controller addresses
  DaVinci EMAC: declare function for all DA8xx CPUs
  DA8xx: add generic GPIO driver
  DaVinci: rename gpio_defs.h to gpio.h
  omap3evm: eth: Include functions only when necessary
  omap3evm: Update ethernet reset sequence for Rev.G board
  omap3evm: eth: split function setup_net_chip
  omap3: Include array definition only when it is used
  omap730p2: fix build breaks
  omap2420h4: fix build breaks
  omap1610inn: fix build breaks
  omap1510inn: fix build breaks
  omap5912osk: fix build breaks
  omap1610h2: fix build breaks

29 files changed, 580 insertions, 173 deletions

diff --git a/include/configs/a320evb.h b/include/configs/a320evb.h
index dfab0f4..62913b5 100644
--- a/include/configs/a320evb.h
+++ b/include/configs/a320evb.h
@@ -24,29 +24,35 @@
 
 #include <asm/arch/a320.h>
 
-/*-----------------------------------------------------------------------
+/*
+ * Linux kernel tagged list
+ */
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+
+/*
  * CPU and Board Configuration Options
  */
 #undef CONFIG_USE_IRQ		/* we don't need IRQ/FIQ stuff */
 
 #undef CONFIG_SKIP_LOWLEVEL_INIT
 
-/*-----------------------------------------------------------------------
+/*
  * Power Management Unit
  */
 #define CONFIG_FTPMU010_POWER
 
-/*-----------------------------------------------------------------------
+/*
  * Timer
  */
 #define CONFIG_SYS_HZ		1000	/* timer ticks per second */
 
-/*-----------------------------------------------------------------------
+/*
  * Real Time Clock
  */
 #define CONFIG_RTC_FTRTC010
 
-/*-----------------------------------------------------------------------
+/*
  * Serial console configuration
  */
 
@@ -62,7 +68,7 @@
 /* valid baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
-/*-----------------------------------------------------------------------
+/*
  * Ethernet
  */
 #define CONFIG_NET_MULTI
@@ -70,7 +76,7 @@
 
 #define CONFIG_BOOTDELAY	3
 
-/*-----------------------------------------------------------------------
+/*
  * Command line configuration.
  */
 #include <config_cmd_default.h>
@@ -79,7 +85,7 @@
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_PING
 
-/*-----------------------------------------------------------------------
+/*
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_LONGHELP			/* undef to save memory */
@@ -96,7 +102,7 @@
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
 
-/*-----------------------------------------------------------------------
+/*
  * Stack sizes
  *
  * The stack sizes are set up in start.S using the settings below
@@ -107,12 +113,12 @@
 #define CONFIG_STACKSIZE_FIQ	(4 * 1024)	/* FIQ stack */
 #endif
 
-/*-----------------------------------------------------------------------
+/*
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)
 
-/*-----------------------------------------------------------------------
+/*
  * SDRAM controller configuration
  */
 #define CONFIG_SYS_FTSDMC020_TP0	(FTSDMC020_TP0_TRAS(2) |	\
@@ -132,7 +138,7 @@
 					 FTSDMC020_BANK_MBW_32   |	\
 					 FTSDMC020_BANK_SIZE_64M)
 
-/*-----------------------------------------------------------------------
+/*
  * Physical Memory Map
  */
 #define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
@@ -155,7 +161,7 @@
 
 #define CONFIG_SYS_TEXT_BASE		0
 
-/*-----------------------------------------------------------------------
+/*
  * Static memory controller configuration
  */
 
@@ -194,7 +200,7 @@
 	{ FTSMC020_BANK1_CONFIG, FTSMC020_BANK1_TIMING, },	\
 }
 
-/*-----------------------------------------------------------------------
+/*
  * FLASH and environment organization
  */
 
diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 09cb951..743768e 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -28,7 +28,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3_AM3517CRANE	1	/* working with CRANEBOARD */
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 18aaadf..6c5728d 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -28,7 +28,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3_AM3517EVM	1	/* working with AM3517EVM */
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 401478b..126907f 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -27,52 +27,62 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_AT91_LEGACY
-
 /* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432 MHz crystal */
-#define CONFIG_SYS_HZ		1000
+#define CONFIG_SYS_HZ			1000
 
-#define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
-#ifdef CONFIG_AT91SAM9G10EK
-#define CONFIG_AT91SAM9G10	1	/* It's an Atmel AT91SAM9G10 SoC*/
+#ifdef CONFIG_AT91SAM9G10
+#define CONFIG_AT91SAM9G10EK		/* It's an Atmel AT91SAM9G10 EK*/
 #else
-#define CONFIG_AT91SAM9261	1	/* It's an Atmel AT91SAM9261 SoC*/
+#define CONFIG_AT91SAM9261EK		/* It's an Atmel AT91SAM9261 EK*/
 #endif
+
+#include <asm/hardware.h>
+
 #define CONFIG_ARCH_CPU_INIT
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
 
-#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG	1
+#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+#define CONFIG_DISPLAY_CPUINFO
+
+#define CONFIG_ATMEL_LEGACY
+#define CONFIG_SYS_TEXT_BASE		0x21f00000
+
 /*
  * Hardware drivers
  */
-#define CONFIG_AT91_GPIO	1
-#define CONFIG_ATMEL_USART	1
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3		1	/* USART 3 is DBGU */
+
+/* gpio */
+#define CONFIG_AT91_GPIO
+#define CONFIG_AT91_GPIO_PULLUP		1
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
+#define CONFIG_USART_ID			ATMEL_ID_SYS
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{115200, 57600, 38400, 19200, 9600}
 
 /* LCD */
-#define CONFIG_LCD			1
+#define CONFIG_LCD
 #define LCD_BPP				LCD_COLOR8
-#define CONFIG_LCD_LOGO			1
+#define CONFIG_LCD_LOGO
 #undef LCD_TEST_PATTERN
-#define CONFIG_LCD_INFO			1
-#define CONFIG_LCD_INFO_BELOW_LOGO	1
-#define CONFIG_SYS_WHITE_ON_BLACK		1
-#define CONFIG_ATMEL_LCD		1
+#define CONFIG_LCD_INFO
+#define CONFIG_LCD_INFO_BELOW_LOGO
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONFIG_ATMEL_LCD
 #ifdef CONFIG_AT91SAM9261EK
-#define CONFIG_ATMEL_LCD_BGR555		1
-#else
-#define	CONFIG_AT91SAM9G10_LCD_BASE		0x23E00000	/* LCD is no more in SRAM */
+#define CONFIG_ATMEL_LCD_BGR555
 #endif
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
+
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
 
 /* LED */
 #define CONFIG_AT91_LED
@@ -85,10 +95,10 @@
 /*
  * BOOTP options
  */
-#define CONFIG_BOOTP_BOOTFILESIZE	1
-#define CONFIG_BOOTP_BOOTPATH		1
-#define CONFIG_BOOTP_GATEWAY		1
-#define CONFIG_BOOTP_HOSTNAME		1
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
 
 /*
  * Command line configuration.
@@ -101,33 +111,35 @@
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_SOURCE
 
-#define CONFIG_CMD_PING		1
-#define CONFIG_CMD_DHCP		1
-#define CONFIG_CMD_NAND		1
-#define CONFIG_CMD_USB		1
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_USB
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM			0x20000000
-#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE		0x20000000
+#define CONFIG_SYS_SDRAM_SIZE		0x04000000
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
 
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH		1
+#define CONFIG_HAS_DATAFLASH
 #define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	0xD0000000	/* CS3 */
-#define AT91_SPI_CLK			15000000
-#define DATAFLASH_TCSS			(0x1a << 16)
-#define DATAFLASH_TCHS			(0x1 << 24)
+#define AT91_SPI_CLK				15000000
+#define DATAFLASH_TCSS				(0x1a << 16)
+#define DATAFLASH_TCHS				(0x1 << 24)
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_BASE			0x40000000
-#define CONFIG_SYS_NAND_DBW_8			1
+#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD22 */
 #define CONFIG_SYS_NAND_MASK_ALE		(1 << 22)
 /* our CLE is AD21 */
@@ -138,24 +150,24 @@
 #endif
 
 /* NOR flash - no real flash on this board */
-#define CONFIG_SYS_NO_FLASH			1
+#define CONFIG_SYS_NO_FLASH
 
 /* Ethernet */
-#define CONFIG_NET_MULTI		1
-#define CONFIG_DRIVER_DM9000		1
+#define CONFIG_NET_MULTI
+#define CONFIG_DRIVER_DM9000
 #define CONFIG_DM9000_BASE		0x30000000
 #define DM9000_IO			CONFIG_DM9000_BASE
 #define DM9000_DATA			(CONFIG_DM9000_BASE + 4)
-#define CONFIG_DM9000_USE_16BIT		1
-#define CONFIG_DM9000_NO_SROM		1
+#define CONFIG_DM9000_USE_16BIT
+#define CONFIG_DM9000_NO_SROM
 #define CONFIG_NET_RETRY_COUNT		20
-#define CONFIG_RESET_PHY_R		1
+#define CONFIG_RESET_PHY_R
 
 /* USB */
 #define CONFIG_USB_ATMEL
-#define CONFIG_USB_OHCI_NEW		1
-#define CONFIG_DOS_PARTITION		1
-#define CONFIG_SYS_USB_OHCI_CPU_INIT		1
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
 #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9261_UHP_BASE */
 #ifdef CONFIG_AT91SAM9G10EK
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9g10"
@@ -163,18 +175,18 @@
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9261"
 #endif
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
-#define CONFIG_USB_STORAGE		1
-#define CONFIG_CMD_FAT			1
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_FAT
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END			0x23e00000
 
 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
 
 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
-#define CONFIG_ENV_IS_IN_DATAFLASH	1
+#define CONFIG_ENV_IS_IN_DATAFLASH
 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
 #define CONFIG_ENV_OFFSET	0x4200
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
@@ -188,7 +200,7 @@
 #elif CONFIG_SYS_USE_DATAFLASH_CS3
 
 /* bootstrap + u-boot + env + linux in dataflash on CS3 */
-#define CONFIG_ENV_IS_IN_DATAFLASH	1
+#define CONFIG_ENV_IS_IN_DATAFLASH
 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
 #define CONFIG_ENV_OFFSET	0x4200
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
@@ -202,7 +214,7 @@
 #else /* CONFIG_SYS_USE_NANDFLASH */
 
 /* bootstrap + u-boot + env + linux in nandflash */
-#define CONFIG_ENV_IS_IN_NAND	1
+#define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET		0x60000
 #define CONFIG_ENV_OFFSET_REDUND	0x80000
 #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
@@ -216,22 +228,19 @@
 
 #endif
 
-#define CONFIG_BAUDRATE		115200
-#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
-
 #define CONFIG_SYS_PROMPT		"U-Boot> "
 #define CONFIG_SYS_CBSIZE		256
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP		1
-#define CONFIG_CMDLINE_EDITING	1
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
 
 /*
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
 
-#define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
+#define CONFIG_STACKSIZE		(32*1024)	/* regular stack */
 
 #ifdef CONFIG_USE_IRQ
 #error CONFIG_USE_IRQ not supported
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index f6cb406..d817423 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -27,13 +27,21 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
+
+#define CONFIG_SYS_TEXT_BASE		0x21F00000
+
 /* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_MAIN_CLOCK	16367660	/* 16.367 MHz crystal */
-#define CONFIG_SYS_HZ		1000
+#define CONFIG_SYS_AT91_MAIN_CLOCK	16367660 /* 16.367 MHz crystal */
+#define CONFIG_SYS_AT91_SLOW_CLOCK	32768
+#define CONFIG_SYS_HZ			1000
+
+#define CONFIG_AT91SAM9263EK	1	/* It's an AT91SAM9263EK Board */
 
-#define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
-#define CONFIG_AT91SAM9263	1	/* It's an Atmel AT91SAM9263 SoC*/
-#define CONFIG_AT91SAM9263EK	1	/* on an AT91SAM9263EK Board	*/
 #define CONFIG_ARCH_CPU_INIT
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
 
@@ -43,17 +51,27 @@
 
 #ifndef CONFIG_SYS_USE_BOOT_NORFLASH
 #define CONFIG_SKIP_LOWLEVEL_INIT
+#else
+#define CONFIG_SYS_USE_NORFLASH
 #endif
 
+#define CONFIG_BOARD_EARLY_INIT_F
+
+#define CONFIG_DISPLAY_CPUINFO
+
 /*
  * Hardware drivers
  */
-#define CONFIG_AT91_GPIO	1
-#define CONFIG_ATMEL_USART	1
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3		1	/* USART 3 is DBGU */
+#define CONFIG_ATMEL_LEGACY
+#define CONFIG_AT91_GPIO		1
+#define CONFIG_AT91_GPIO_PULLUP		1
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
+#define CONFIG_USART_ID			ATMEL_ID_SYS
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{115200, 19200, 38400, 57600, 9600}
 
 /* LCD */
 #define CONFIG_LCD			1
@@ -62,16 +80,16 @@
 #undef LCD_TEST_PATTERN
 #define CONFIG_LCD_INFO			1
 #define CONFIG_LCD_INFO_BELOW_LOGO	1
-#define CONFIG_SYS_WHITE_ON_BLACK		1
+#define CONFIG_SYS_WHITE_ON_BLACK	1
 #define CONFIG_ATMEL_LCD		1
 #define CONFIG_ATMEL_LCD_BGR555		1
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
 
 /* LED */
 #define CONFIG_AT91_LED
-#define	CONFIG_RED_LED		AT91_PIO_PORTB, 7	/* the power led */
-#define	CONFIG_GREEN_LED	AT91_PIO_PORTB, 8	/* the user1 led */
-#define	CONFIG_YELLOW_LED	AT91_PIO_PORTC, 29	/* the user2 led */
+#define	CONFIG_RED_LED		AT91_PIN_PB7	/* the power led */
+#define	CONFIG_GREEN_LED	AT91_PIN_PB8	/* the user1 led */
+#define	CONFIG_YELLOW_LED	AT91_PIN_PC29	/* the user2 led */
 
 #define CONFIG_BOOTDELAY	3
 
@@ -101,8 +119,11 @@
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM			0x20000000
-#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
+#define CONFIG_SYS_SDRAM_SIZE		0x04000000
+
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
 
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
@@ -254,19 +275,14 @@
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
-#define CONFIG_SYS_NAND_BASE			0x40000000
+#define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8			1
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
 /* our CLE is AD22 */
 #define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIO_PORTD, 15
-#define CONFIG_SYS_NAND_READY_PIN	AT91_PIO_PORTA, 22
-/*
-#define CONFIG_SYS_NAND_ENABLE_PIN  AT91_PIN_PD15
-#define CONFIG_SYS_NAND_READY_PIN  AT91_PIN_PA22
-*/
-
+#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PD15
+#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PA22
 
 #define CONFIG_SYS_64BIT_VSPRINTF		/* needed for nand_util.c */
 #endif
@@ -291,7 +307,7 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END			0x23e00000
 
 #ifdef CONFIG_SYS_USE_DATAFLASH
@@ -311,7 +327,7 @@
 #elif CONFIG_SYS_USE_NANDFLASH
 
 /* bootstrap + u-boot + env + linux in nandflash */
-#define CONFIG_ENV_IS_IN_NAND	1
+#define CONFIG_ENV_IS_IN_NAND		1
 #define CONFIG_ENV_OFFSET		0x60000
 #define CONFIG_ENV_OFFSET_REDUND	0x80000
 #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
@@ -323,15 +339,12 @@
 
 #endif
 
-#define CONFIG_BAUDRATE		115200
-#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
-
 #define CONFIG_SYS_PROMPT		"U-Boot> "
 #define CONFIG_SYS_CBSIZE		256
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 #define CONFIG_SYS_LONGHELP		1
-#define CONFIG_CMDLINE_EDITING	1
+#define CONFIG_CMDLINE_EDITING		1
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_HUSH_PARSER
 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
@@ -339,12 +352,10 @@
 /*
  * Size of malloc() pool
  */
-#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
+#define CONFIG_SYS_MALLOC_LEN	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
 
 #define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
 
-#ifdef CONFIG_USE_IRQ
-#error CONFIG_USE_IRQ not supported
-#endif
+#undef CONFIG_USE_IRQ
 
 #endif
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 8dbd082..3ca09e1 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -27,33 +27,42 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_AT91_LEGACY
+#include <asm/hardware.h>
+
+#define CONFIG_SYS_TEXT_BASE		0x21F00000
 
 /* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */
-#define CONFIG_SYS_HZ		1000
+#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* main clock xtal */
+#define CONFIG_SYS_HZ			1000
+
+#define CONFIG_AT91SAM9RLEK		1	/* It's an AT91SAM9RLEK Board */
 
-#define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
-#define CONFIG_AT91SAM9RL	1	/* It's an Atmel AT91SAM9RL SoC*/
-#define CONFIG_AT91SAM9RLEK	1	/* on an AT91SAM9RLEK Board	*/
 #define CONFIG_ARCH_CPU_INIT
-#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
+#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */
 
-#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG	1
+#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_INITRD_TAG		1
 
-#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_DISPLAY_CPUINFO
+
+#define CONFIG_ATMEL_LEGACY
+#define CONFIG_AT91_GPIO		1
+#define CONFIG_AT91_GPIO_PULLUP		1
 
 /*
  * Hardware drivers
  */
-#define CONFIG_AT91_GPIO	1
-#define CONFIG_ATMEL_USART	1
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3		1	/* USART 3 is DBGU */
+
+/* serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
+#define CONFIG_USART_ID			ATMEL_ID_SYS
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{115200, 19200, 38400, 57600, 9600}
 
 /* LCD */
 #define CONFIG_LCD			1
@@ -62,10 +71,13 @@
 #undef LCD_TEST_PATTERN
 #define CONFIG_LCD_INFO			1
 #define CONFIG_LCD_INFO_BELOW_LOGO	1
-#define CONFIG_SYS_WHITE_ON_BLACK		1
+#define CONFIG_SYS_WHITE_ON_BLACK	1
 #define CONFIG_ATMEL_LCD		1
 #define CONFIG_ATMEL_LCD_RGB565		1
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
+/* Let board_init_f handle the framebuffer allocation */
+#undef CONFIG_FB_ADDR
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
+
 
 /* LED */
 #define CONFIG_AT91_LED
@@ -85,25 +97,29 @@
 #undef CONFIG_CMD_IMLS
 #undef CONFIG_CMD_LOADS
 #undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
 #undef CONFIG_CMD_SOURCE
 #undef CONFIG_CMD_USB
 
-#define CONFIG_CMD_NAND		1
+#define CONFIG_CMD_NAND			1
 
 /* SDRAM */
 #define CONFIG_NR_DRAM_BANKS		1
-#define PHYS_SDRAM			0x20000000
-#define PHYS_SDRAM_SIZE			0x04000000	/* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
+#define CONFIG_SYS_SDRAM_SIZE		0x04000000
+
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
 
 /* DataFlash */
 #define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH		1
+#define CONFIG_HAS_DATAFLASH			1
 #define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
-#define AT91_SPI_CLK			15000000
-#define DATAFLASH_TCSS			(0x1a << 16)
-#define DATAFLASH_TCHS			(0x1 << 24)
+#define AT91_SPI_CLK				15000000
+#define DATAFLASH_TCSS				(0x1a << 16)
+#define DATAFLASH_TCHS				(0x1 << 24)
 
 /* NOR flash - not present */
 #define CONFIG_SYS_NO_FLASH			1
@@ -112,7 +128,7 @@
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
-#define CONFIG_SYS_NAND_BASE			0x40000000
+#define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8			1
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
@@ -129,7 +145,7 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END			0x23e00000
 
 #ifdef CONFIG_SYS_USE_DATAFLASH
@@ -149,7 +165,7 @@
 #else /* CONFIG_SYS_USE_NANDFLASH */
 
 /* bootstrap + u-boot + env + linux in nandflash */
-#define CONFIG_ENV_IS_IN_NAND	1
+#define CONFIG_ENV_IS_IN_NAND		1
 #define CONFIG_ENV_OFFSET		0x60000
 #define CONFIG_ENV_OFFSET_REDUND	0x80000
 #define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
@@ -161,25 +177,20 @@
 
 #endif
 
-#define CONFIG_BAUDRATE		115200
-#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
-
 #define CONFIG_SYS_PROMPT		"U-Boot> "
 #define CONFIG_SYS_CBSIZE		256
 #define CONFIG_SYS_MAXARGS		16
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 #define CONFIG_SYS_LONGHELP		1
-#define CONFIG_CMDLINE_EDITING	1
+#define CONFIG_CMDLINE_EDITING		1
 
 /*
  * Size of malloc() pool
  */
-#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
+#define CONFIG_SYS_MALLOC_LEN	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
 
 #define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
 
-#ifdef CONFIG_USE_IRQ
-#error CONFIG_USE_IRQ not supported
-#endif
+#undef CONFIG_USE_IRQ
 
 #endif
diff --git a/include/configs/ca9x4_ct_vxp.h b/include/configs/ca9x4_ct_vxp.h
index f0ac79a..8c57eab 100644
--- a/include/configs/ca9x4_ct_vxp.h
+++ b/include/configs/ca9x4_ct_vxp.h
@@ -32,9 +32,6 @@
 #define CONFIG_REVISION_TAG		1
 #define CONFIG_SYS_TEXT_BASE		0x60800000
 
-/* High Level Configuration Options */
-#define CONFIG_ARMV7			1
-
 #define CONFIG_SYS_MEMTEST_START	0x60000000
 #define CONFIG_SYS_MEMTEST_END		0x20000000
 #define CONFIG_SYS_HZ			1000
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 93a1b26..16a5f5b 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -36,7 +36,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 125c690..cf77606 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -32,7 +32,6 @@
 #define __CONFIG_H
 
 /* High Level Configuration Options */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
diff --git a/include/configs/dig297.h b/include/configs/dig297.h
index 7aeb24e..b68f073 100644
--- a/include/configs/dig297.h
+++ b/include/configs/dig297.h
@@ -35,7 +35,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		/* which is a 34XX */
 #define CONFIG_OMAP3430		/* which is in a 3430 */
diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h
new file mode 100644
index 0000000..cc14f49
--- /dev/null
+++ b/include/configs/gplugd.h
@@ -0,0 +1,87 @@
+/*
+ * (C) Copyright 2011
+ * eInfochips Ltd. <www.einfochips.com>
+ * Written-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
+ *
+ * Based on Aspenite:
+ * (C) Copyright 2010
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
+ * Contributor: Mahavir Jain <mjain@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __CONFIG_GPLUGD_H
+#define __CONFIG_GPLUGD_H
+
+/*
+ * Version number information
+ */
+#define CONFIG_IDENT_STRING	"\nMarvell-gplugD"
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_SHEEVA_88SV331xV5	1	/* CPU Core subversion */
+#define CONFIG_ARMADA100		1	/* SOC Family Name */
+#define CONFIG_ARMADA168		1	/* SOC Used on this Board */
+#define CONFIG_MACH_SHEEVAD			/* Machine type */
+#define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
+
+#define	CONFIG_SYS_TEXT_BASE	0x00f00000
+
+/*
+ * There is no internal RAM in ARMADA100, using DRAM
+ * TBD: dcache to be used for this
+ */
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE - 0x00200000)
+#define CONFIG_NR_DRAM_BANKS_MAX	2
+
+/*
+ * Commands configuration
+ */
+#define CONFIG_SYS_NO_FLASH		/* Declare no flash (NOR/SPI) */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_AUTOSCRIPT
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+
+/*
+ * mv-common.h should be defined after CMD configs since it used them
+ * to enable certain macros
+ */
+#include "mv-common.h"
+#undef CONFIG_ARCH_MISC_INIT
+
+#ifdef CONFIG_SYS_NS16550_COM1
+#undef CONFIG_SYS_NS16550_COM1
+#endif /* CONFIG_SYS_NS16550_COM1 */
+
+#define CONFIG_SYS_NS16550_COM1 ARMD1_UART3_BASE
+
+/*
+ * Environment variables configurations
+ */
+#define CONFIG_ENV_IS_NOWHERE	1	/* if env in SDRAM */
+#define CONFIG_ENV_SIZE	0x20000		/* 64k */
+
+#endif	/* __CONFIG_GPLUGD_H */
diff --git a/include/configs/grasshopper.h b/include/configs/grasshopper.h
new file mode 100644
index 0000000..9779449
--- /dev/null
+++ b/include/configs/grasshopper.h
@@ -0,0 +1,198 @@
+/*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co.KG, Andreas Bießmann <biessmann@corscience.de>
+ *
+ * Configuration settings for the grasshopper (ICnova AP7000) board
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __GRASSHOPPER_CONFIG_H
+#define __GRASSHOPPER_CONFIG_H
+
+#include <asm/arch/hardware.h>
+
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+
+/*
+ * Timer clock frequency. We're using the CPU-internal COUNT register
+ * for this, so this is equivalent to the CPU core clock frequency
+ */
+#define CONFIG_SYS_HZ			1000
+
+/*
+ * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
+ * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
+ * PLL frequency.
+ * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
+ */
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
+#define CONFIG_SYS_OSC0_HZ		20000000
+#define CONFIG_SYS_PLL0_DIV		1
+#define CONFIG_SYS_PLL0_MUL		7
+#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES	16
+/*
+ * Set the CPU running at:
+ * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
+ */
+#define CONFIG_SYS_CLKDIV_CPU		0
+/*
+ * Set the HSB running at:
+ * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
+ */
+#define CONFIG_SYS_CLKDIV_HSB		1
+/*
+ * Set the PBA running at:
+ * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
+ */
+#define CONFIG_SYS_CLKDIV_PBA		2
+/*
+ * Set the PBB running at:
+ * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
+ */
+#define CONFIG_SYS_CLKDIV_PBB		1
+
+/* Reserve VM regions for SDRAM and NOR flash */
+#define CONFIG_SYS_NR_VM_REGIONS	2
+
+/*
+ * The PLLOPT register controls the PLL like this:
+ *   icp = PLLOPT<2>
+ *   ivco = PLLOPT<1:0>
+ *
+ * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
+ */
+#define CONFIG_SYS_PLL0_OPT		0x04
+
+#define CONFIG_USART_BASE		ATMEL_BASE_USART1
+#define CONFIG_USART_ID			1
+
+/* User serviceable stuff */
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+#define CONFIG_STACKSIZE		(2048)
+
+#define CONFIG_BAUDRATE			115200
+
+/*
+ * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
+ * data on the serial line may interrupt the boot sequence.
+ */
+#define CONFIG_BOOTDELAY		1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_PROMPT		"Press SPACE to abort autoboot in %d" \
+					" seconds\n", bootdelay
+#define CONFIG_AUTOBOOT_DELAY_STR	"d"
+#define CONFIG_AUTOBOOT_STOP_STR	" "
+
+/*
+ * After booting the board for the first time, new ethernet addresses
+ * should be generated and assigned to the environment variables
+ * "ethaddr". This is normally done during production.
+ */
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+/* remove unneeded commands */
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+
+/* add useful commands */
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"~> "
+#define CONFIG_CMDLINE_EDITING
+
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
+#define CONFIG_SYS_NR_PIOS		5
+#define CONFIG_SYS_HSDRAMC
+
+#define CONFIG_SYS_DCACHE_LINESZ	32
+#define CONFIG_SYS_ICACHE_LINESZ	32
+
+#define CONFIG_NR_DRAM_BANKS		1
+
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+
+#define CONFIG_SYS_FLASH_BASE		0x00000000
+#define CONFIG_SYS_FLASH_SIZE		0x800000
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_MAX_FLASH_SECT	135
+
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE		0x00000000
+
+#define CONFIG_SYS_INTRAM_BASE		INTERNAL_SRAM_BASE
+#define CONFIG_SYS_INTRAM_SIZE		INTERNAL_SRAM_SIZE
+#define CONFIG_SYS_SDRAM_BASE		EBI_SDRAM_BASE
+
+#define CONFIG_ENV_IS_IN_FLASH
+/* place u-boot env in flash sector after u-boot */
+#define CONFIG_ENV_SIZE			0x10000
+#define CONFIG_ENV_ADDR			0x20000
+
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INTRAM_BASE + \
+					 CONFIG_SYS_INTRAM_SIZE)
+
+#define CONFIG_SYS_MALLOC_LEN		(256*1024)
+#define CONFIG_SYS_DMA_ALLOC_LEN	(16384)
+
+/* Allow 4MB for the kernel run-time image */
+#define CONFIG_SYS_LOAD_ADDR		(EBI_SDRAM_BASE + 0x00400000)
+#define CONFIG_SYS_BOOTPARAMS_LEN	(16 * 1024)
+
+/* Other configuration settings that shouldn't have to change all that often */
+#define CONFIG_SYS_PROMPT		"U-Boot> "
+#define CONFIG_SYS_CBSIZE		256
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					 sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP
+
+#define CONFIG_SYS_MEMTEST_START	EBI_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x700000)
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 115200, 38400, 19200, 9600, 2400 }
+
+#endif /* __GRASSHOPPER_CONFIG_H */
+/* vim: set ts=8 noet: */
diff --git a/include/configs/igep0020.h b/include/configs/igep0020.h
index 5af9bec..b6534e4 100644
--- a/include/configs/igep0020.h
+++ b/include/configs/igep0020.h
@@ -25,7 +25,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
diff --git a/include/configs/igep0030.h b/include/configs/igep0030.h
index 92144af..d85e5ae 100644
--- a/include/configs/igep0030.h
+++ b/include/configs/igep0030.h
@@ -25,7 +25,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 9fd80ed..d7cbc2f 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -31,7 +31,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 13a4fbf..afa18aa 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -36,7 +36,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 242b317..d6e0a06 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -23,7 +23,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index 39c87a8..bd55abc 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -26,7 +26,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h
index 55bbcd4..e1d8c78 100644
--- a/include/configs/omap3_sdp3430.h
+++ b/include/configs/omap3_sdp3430.h
@@ -36,7 +36,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index 9183849..aeac7c7 100644
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -32,7 +32,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h
index 3573edf..2a56182 100644
--- a/include/configs/omap3_zoom2.h
+++ b/include/configs/omap3_zoom2.h
@@ -33,7 +33,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index 1daffb7..e313231 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -30,7 +30,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP44XX		1	/* which is a 44XX */
 #define CONFIG_OMAP4430		1	/* which is in a 4430 */
@@ -237,4 +236,41 @@
 #define CONFIG_SYS_PL310_BASE	0x48242000
 #endif
 
+/* Defines for SDRAM init */
+#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
+#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
+#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
+#endif
+
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_TEXT_BASE		0x40304350
+#define CONFIG_SPL_MAX_SIZE		0x8000	/* 32 K */
+#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR	0x80000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
+
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds"
+
+/*
+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
+ * 64 bytes before this address should be set aside for u-boot.img's
+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
+ * other needs.
+ */
+#define CONFIG_SYS_TEXT_BASE		0x80100000
+
 #endif /* __CONFIG_H */
diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h
index 68ffa87..5b3110c 100644
--- a/include/configs/omap4_sdp4430.h
+++ b/include/configs/omap4_sdp4430.h
@@ -31,7 +31,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP44XX		1	/* which is a 44XX */
 #define CONFIG_OMAP4430		1	/* which is in a 4430 */
@@ -243,4 +242,41 @@
 #define CONFIG_SYS_PL310_BASE	0x48242000
 #endif
 
+/* Defines for SDRAM init */
+#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
+#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
+#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
+#endif
+
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_TEXT_BASE		0x40304350
+#define CONFIG_SPL_MAX_SIZE		0x8000	/* 32 K */
+#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR	0x80000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
+
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds"
+
+/*
+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
+ * 64 bytes before this address should be set aside for u-boot.img's
+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
+ * other needs.
+ */
+#define CONFIG_SYS_TEXT_BASE		0x80100000
+
 #endif /* __CONFIG_H */
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index d648ce8..a5aa859 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -28,7 +28,6 @@
 #define __CONFIG_H
 
 /* High Level Configuration Options */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_SAMSUNG		1	/* in a SAMSUNG core */
 #define CONFIG_S5P		1	/* which is in a S5P Family */
 #define CONFIG_S5PC110		1	/* which is in a S5PC110 */
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index bbe104b..4031016 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -30,7 +30,6 @@
  * High Level Configuration Options
  * (easy to change)
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_SAMSUNG		1	/* in a SAMSUNG core */
 #define CONFIG_S5P		1	/* which is in a S5P Family */
 #define CONFIG_S5PC210		1	/* which is in a S5PC210 */
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index 70e23b5..19dde1b 100644
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -32,7 +32,6 @@
  * High Level Configuration Options
  * (easy to change)
  */
-#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_SAMSUNG		1	/* in a SAMSUNG core */
 #define CONFIG_S5P		1	/* which is in a S5P Family */
 #define CONFIG_S5PC100		1	/* which is in a S5PC100 */
diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
index a7f5850..2f97bea 100644
--- a/include/configs/smdkv310.h
+++ b/include/configs/smdkv310.h
@@ -26,7 +26,6 @@
 #define __CONFIG_H
 
 /* High Level Configuration Options */
-#define CONFIG_ARMV7			1	/*This is an ARM V7 CPU core */
 #define CONFIG_SAMSUNG			1	/* in a SAMSUNG core */
 #define CONFIG_S5P			1	/* S5P Family */
 #define CONFIG_S5PC210			1	/* which is in a S5PC210 SoC */
@@ -166,4 +165,7 @@
 #define CONFIG_SMC911X_16_BIT
 #define CONFIG_ENV_SROM_BANK		1
 #endif /*CONFIG_CMD_NET*/
+
+/* Enable devicetree support */
+#define CONFIG_OF_LIBFDT
 #endif	/* __CONFIG_H */
diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h
index 4e5bdea..55d19b5 100644
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -86,6 +86,8 @@
 #define CONFIG_SYS_LOADS_BAUD_CHANGE
 
 /* NAND FLASH Configuration */
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
 #define CONFIG_NAND_SPEAR			1
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_MTD_NAND_VERIFY_WRITE		1
@@ -209,4 +211,14 @@
 #define PHYS_SDRAM_1				0x00000000
 #define PHYS_SDRAM_1_MAXSIZE			0x40000000
 
+#define CONFIG_SYS_SDRAM_BASE			PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR		0xD2800000
+#define CONFIG_SYS_INIT_RAM_SIZE		0x2000
+
+#define CONFIG_SYS_INIT_SP_OFFSET		\
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_SYS_INIT_SP_ADDR			\
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
 #endif
diff --git a/include/configs/versatile.h b/include/configs/versatile.h
index db68965..32cee82 100644
--- a/include/configs/versatile.h
+++ b/include/configs/versatile.h
@@ -74,6 +74,7 @@
 /*
  * Size of malloc() pool
  */
+#define CONFIG_ENV_SIZE			8192
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)
 
 /*
@@ -168,9 +169,26 @@
 #define PHYS_SDRAM_1_SIZE	0x08000000	/* 128 MB */
 #define PHYS_FLASH_SIZE		0x04000000	/* 64MB */
 
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	0x00800000
+#define CONFIG_SYS_INIT_RAM_SIZE	0x000FFFFF
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
+						GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_INIT_RAM_ADDR + \
+						CONFIG_SYS_GBL_DATA_OFFSET)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */
+#ifdef CONFIG_ARCH_VERSATILE_QEMU
+#define CONFIG_SYS_TEXT_BASE		0x10000
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_SYS_MONITOR_LEN		0x80000
+#else
+#define CONFIG_SYS_TEXT_BASE		0x01000000
 /*
  * Use the CFI flash driver for ease of use
  */
@@ -222,7 +240,6 @@
 /* The ARM Boot Monitor is shipped in the lowest sector of flash */
 
 #define FLASH_TOP			(CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE)
-#define CONFIG_ENV_SIZE			8192
 #define CONFIG_ENV_ADDR			(FLASH_TOP - CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
 #define CONFIG_SYS_MONITOR_BASE		(CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN)
@@ -230,4 +247,6 @@
 #define CONFIG_SYS_FLASH_PROTECTION	/* The devices have real protection */
 #define CONFIG_SYS_FLASH_EMPTY_INFO	/* flinfo indicates empty blocks */
 
+#endif
+
 #endif	/* __CONFIG_H */