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authorStefan Roese <sr@denx.de>2009-10-29 15:04:35 +0100
committerStefan Roese <sr@denx.de>2009-11-09 11:26:57 +0100
commitb0b867462c569e7accd6f78c942cbab028116ecf (patch)
tree28ff468681f1689d4abf7478eae575d748d04bfa /include/configs
parent2cd95a25cb0ee8218b271d23d64fb3f719ac5390 (diff)
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ppc4xx: Consolidate 4xx PCIe board specific configuration
This patch consolidates the PPC4xx board specific PCIe configuration code. This way the duplicated code is removed. Boards can implement a special, non standard behaviour (e.g. number of PCIe slots, etc) by overriding the weak default functions. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/yucca.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/configs/yucca.h b/include/configs/yucca.h
index b165bd7..42f8807 100644
--- a/include/configs/yucca.h
+++ b/include/configs/yucca.h
@@ -389,6 +389,11 @@
#define FPGA_REG1A_PE_SELSOURCE_0 0x0002
#define FPGA_REG1A_PE_SELSOURCE_1 0x0001
+#define FPGA_REG1A_GLED_ENCODE(n) (FPGA_REG1A_PE0_GLED >> (n))
+#define FPGA_REG1A_YLED_ENCODE(n) (FPGA_REG1A_PE0_YLED >> (n))
+#define FPGA_REG1A_PWRON_ENCODE(n) (FPGA_REG1A_PE0_PWRON >> (n))
+#define FPGA_REG1A_REFCLK_ENCODE(n) (FPGA_REG1A_PE0_REFCLK_ENABLE >> (n))
+
/*----------------------------------------------------------------------------+
| PCIe Miscellaneous
+----------------------------------------------------------------------------*/
@@ -407,6 +412,9 @@
#define FPGA_REG1C_PE1_PERST 0x0008
#define FPGA_REG1C_PE2_PERST 0x0004
+#define FPGA_REG1C_ROOTPOINT_ENCODE(n) (FPGA_REG1C_PE0_ROOTPOINT >> (n))
+#define FPGA_REG1C_PERST_ENCODE(n) (FPGA_REG1C_PE0_PERST >> (n))
+
/*----------------------------------------------------------------------------+
| Defines
+----------------------------------------------------------------------------*/