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author | Tom Rini <trini@konsulko.com> | 2016-06-18 23:46:43 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2016-06-18 23:46:43 -0400 |
commit | 6beacfcff81bdc04c10a440971b0fb683ee57534 (patch) | |
tree | 5630756d13e720f080a7b6a6d4b82df422e11d81 /include/configs | |
parent | a10a31ec91ad2ee514a42baea9314553aa972676 (diff) | |
parent | cf0a8dab8ee8c1eafbcd9ed081f5cab15e5a58a5 (diff) | |
download | u-boot-imx-6beacfcff81bdc04c10a440971b0fb683ee57534.zip u-boot-imx-6beacfcff81bdc04c10a440971b0fb683ee57534.tar.gz u-boot-imx-6beacfcff81bdc04c10a440971b0fb683ee57534.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/socfpga_is1.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h new file mode 100644 index 0000000..6f5dfce --- /dev/null +++ b/include/configs/socfpga_is1.h @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2014 Marek Vasut <marex@denx.de> + * Copyright (C) 2016 Pavel Machek <pavel@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __CONFIG_SOCFPGA_IS1_H__ +#define __CONFIG_SOCFPGA_IS1_H__ + +#include <asm/arch/base_addr_ac5.h> + +/* U-Boot Commands */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_DOS_PARTITION +#define CONFIG_FAT_WRITE +#define CONFIG_HW_WATCHDOG + +/* Memory configurations */ +#define PHYS_SDRAM_1_SIZE 0x10000000 + +/* Booting Linux */ +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTFILE "zImage" +#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE) +#define CONFIG_LOADADDR 0x01000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_ENV_IS_IN_SPI_FLASH + +/* Ethernet on SoC (EMAC) */ +#if defined(CONFIG_CMD_NET) +#define CONFIG_ARP_TIMEOUT 500UL + +/* PHY */ +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 +#endif + +/* The rest of the configuration is shared */ +#include <configs/socfpga_common.h> + +/* + * Bootcounter + */ +#define CONFIG_BOOTCOUNT_LIMIT +/* last 2 lwords in OCRAM */ +#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfffffff8 +#define CONFIG_SYS_BOOTCOUNT_BE + +#endif /* __CONFIG_SOCFPGA_IS1_H__ */ |