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author | Joe Hershberger <joe.hershberger@ni.com> | 2011-10-11 23:57:09 -0500 |
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committer | Kim Phillips <kim.phillips@freescale.com> | 2011-11-03 18:27:52 -0500 |
commit | 34f819685ca875c3a0d06ac5ce291431921f3ad2 (patch) | |
tree | 75883013ddc2afb2cb45c1aefc1425220df85f9f /include/configs | |
parent | 7c3a4f986c6a2a300ed711b2df7b62fd991feafa (diff) | |
download | u-boot-imx-34f819685ca875c3a0d06ac5ce291431921f3ad2.zip u-boot-imx-34f819685ca875c3a0d06ac5ce291431921f3ad2.tar.gz u-boot-imx-34f819685ca875c3a0d06ac5ce291431921f3ad2.tar.bz2 |
mpc83xx: cosmetic: MPC8308RDB.h checkpatch compliance
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/MPC8308RDB.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 210b602..3979aa0 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -212,7 +212,7 @@ */ #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ #define CONFIG_SYS_GBL_DATA_OFFSET \ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) @@ -262,19 +262,19 @@ /* * NAND Flash on the Local Bus */ -#define CONFIG_SYS_NAND_BASE 0xE0600000 /* 0xE0600000 */ -#define CONFIG_SYS_BR1_PRELIM ( CONFIG_SYS_NAND_BASE \ +#define CONFIG_SYS_NAND_BASE 0xE0600000 /* 0xE0600000 */ +#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_NAND_BASE \ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ - | BR_PS_8 /* Port Size = 8 bit */ \ + | BR_PS_8 /* 8 bit port */ \ | BR_MS_FCM /* MSEL = FCM */ \ - | BR_V ) /* valid */ -#define CONFIG_SYS_OR1_PRELIM ( 0xFFFF8000 /* length 32K */ \ + | BR_V) /* valid */ +#define CONFIG_SYS_OR1_PRELIM (0xFFFF8000 /* length 32K */ \ | OR_FCM_CSCT \ | OR_FCM_CST \ | OR_FCM_CHT \ | OR_FCM_SCY_1 \ | OR_FCM_TRLX \ - | OR_FCM_EHTR ) + | OR_FCM_EHTR) /* 0xFFFF8396 */ #define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE @@ -323,7 +323,7 @@ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {{0x51}} /* Don't probe these addrs */ +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} } /* Don't probe these addrs */ #define CONFIG_SYS_I2C_OFFSET 0x3000 #define CONFIG_SYS_I2C2_OFFSET 0x3100 |