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authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>2013-10-29 13:33:51 +0900
committerHeiko Schocher <hs@denx.de>2013-11-13 06:08:26 +0100
commit2035d77d790044f389a18c0e6baa05e86d4b32a0 (patch)
tree96a4e48046a2758772060696cb4c2606540cd09e /include/configs
parent63c4f17b2f8017d22241522a48c765073b8791b0 (diff)
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i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework
This updates to new I2C framwwork on sh_i2c. And this also updates boards(kzm9g and ecovec) that using sh_i2c. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/ecovec.h15
-rw-r--r--include/configs/kzm9g.h31
2 files changed, 23 insertions, 23 deletions
diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h
index 335e9cd..3483cf1 100644
--- a/include/configs/ecovec.h
+++ b/include/configs/ecovec.h
@@ -58,18 +58,17 @@
/* I2C */
#define CONFIG_CMD_I2C
-#define CONFIG_SH_I2C 1
-#define CONFIG_HARD_I2C 1
-#define CONFIG_I2C_MULTI_BUS 1
-#define CONFIG_SYS_MAX_I2C_BUS 2
-#define CONFIG_SYS_I2C_MODULE 1
-#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SH
#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 2
+#define CONFIG_SYS_I2C_SH_BASE0 0xA4470000
+#define CONFIG_SYS_I2C_SH_SPEED0 100000
+#define CONFIG_SYS_I2C_SH_BASE1 0xA4750000
+#define CONFIG_SYS_I2C_SH_SPEED1 100000
#define CONFIG_SH_I2C_DATA_HIGH 4
#define CONFIG_SH_I2C_DATA_LOW 5
#define CONFIG_SH_I2C_CLOCK 41666666
-#define CONFIG_SH_I2C_BASE0 0xA4470000
-#define CONFIG_SH_I2C_BASE1 0xA4750000
/* Ether */
#define CONFIG_SH_ETHER 1
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 1afd487..f75de5e 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -139,21 +139,22 @@
/* I2C */
#define CONFIG_CMD_I2C
-#define CONFIG_SH_I2C 1
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_SH
+#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
+#define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
+#define CONFIG_SYS_I2C_SH_SPEED0 100000
+#define CONFIG_SYS_I2C_SH_BASE1 0xE6822000
+#define CONFIG_SYS_I2C_SH_SPEED1 100000
+#define CONFIG_SYS_I2C_SH_BASE2 0xE6824000
+#define CONFIG_SYS_I2C_SH_SPEED2 100000
+#define CONFIG_SYS_I2C_SH_BASE3 0xE6826000
+#define CONFIG_SYS_I2C_SH_SPEED3 100000
+#define CONFIG_SYS_I2C_SH_BASE4 0xE6828000
+#define CONFIG_SYS_I2C_SH_SPEED4 100000
#define CONFIG_SH_I2C_8BIT
-#define CONFIG_HARD_I2C
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_MAX_I2C_BUS (5)
-#define CONFIG_SYS_I2C_MODULE
-#define CONFIG_SYS_I2C_SPEED (100000) /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE (0x7F)
-#define CONFIG_SH_I2C_DATA_HIGH (4)
-#define CONFIG_SH_I2C_DATA_LOW (5)
-#define CONFIG_SH_I2C_CLOCK (104000000) /* 104 MHz */
-#define CONFIG_SH_I2C_BASE0 (0xE6820000)
-#define CONFIG_SH_I2C_BASE1 (0xE6822000)
-#define CONFIG_SH_I2C_BASE2 (0xE6824000)
-#define CONFIG_SH_I2C_BASE3 (0xE6826000)
-#define CONFIG_SH_I2C_BASE4 (0xE6828000)
+#define CONFIG_SH_I2C_DATA_HIGH 4
+#define CONFIG_SH_I2C_DATA_LOW 5
+#define CONFIG_SH_I2C_CLOCK 104000000 /* 104 MHz */
#endif /* __KZM9G_H */