diff options
| author | Andreas Bießmann <biessmann@corscience.de> | 2011-04-18 04:12:35 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-05-18 07:56:53 +0200 |
| commit | b78431a43d6798ab9b560ec2d6dab1afd1003f9e (patch) | |
| tree | 74de0f8d0f6850c6f9e754d653732daef7b7e6e6 /include/configs | |
| parent | bb7dc6af2031abb58434f583fe867b4cc966df5b (diff) | |
| download | u-boot-imx-b78431a43d6798ab9b560ec2d6dab1afd1003f9e.zip u-boot-imx-b78431a43d6798ab9b560ec2d6dab1afd1003f9e.tar.gz u-boot-imx-b78431a43d6798ab9b560ec2d6dab1afd1003f9e.tar.bz2 | |
atngw100: fix "#define XXXX 1"
Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/atngw100.h | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index a93ba8b..70f1e8a 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -26,10 +26,10 @@ #include <asm/arch/hardware.h> -#define CONFIG_AVR32 1 -#define CONFIG_AT32AP 1 -#define CONFIG_AT32AP7000 1 -#define CONFIG_ATNGW100 1 +#define CONFIG_AVR32 +#define CONFIG_AT32AP +#define CONFIG_AT32AP7000 +#define CONFIG_ATNGW100 #define CONFIG_SYS_HZ 1000 @@ -38,8 +38,8 @@ * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency * and the PBA bus to run at 1/4 the PLL frequency. */ -#define CONFIG_PLL 1 -#define CONFIG_SYS_POWER_MANAGER 1 +#define CONFIG_PLL +#define CONFIG_SYS_POWER_MANAGER #define CONFIG_SYS_OSC0_HZ 20000000 #define CONFIG_SYS_PLL0_DIV 1 #define CONFIG_SYS_PLL0_MUL 7 @@ -64,11 +64,11 @@ #define CONFIG_USART_BASE ATMEL_BASE_USART1 #define CONFIG_USART_ID 1 /* User serviceable stuff */ -#define CONFIG_DOS_PARTITION 1 +#define CONFIG_DOS_PARTITION -#define CONFIG_CMDLINE_TAG 1 -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG #define CONFIG_STACKSIZE (2048) @@ -83,8 +83,8 @@ * data on the serial line may interrupt the boot sequence. */ #define CONFIG_BOOTDELAY 1 -#define CONFIG_AUTOBOOT 1 -#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT +#define CONFIG_AUTOBOOT_KEYED #define CONFIG_AUTOBOOT_PROMPT \ "Press SPACE to abort autoboot in %d seconds\n", bootdelay #define CONFIG_AUTOBOOT_DELAY_STR "d" @@ -95,8 +95,8 @@ * should be generated and assigned to the environment variables * "ethaddr" and "eth1addr". This is normally done during production. */ -#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 -#define CONFIG_NET_MULTI 1 +#define CONFIG_OVERWRITE_ETHADDR_ONCE +#define CONFIG_NET_MULTI /* * BOOTP/DHCP options @@ -123,25 +123,25 @@ #undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_XIMG -#define CONFIG_ATMEL_USART 1 -#define CONFIG_MACB 1 -#define CONFIG_PORTMUX_PIO 1 +#define CONFIG_ATMEL_USART +#define CONFIG_MACB +#define CONFIG_PORTMUX_PIO #define CONFIG_SYS_NR_PIOS 5 -#define CONFIG_SYS_HSDRAMC 1 -#define CONFIG_MMC 1 -#define CONFIG_ATMEL_MCI 1 -#define CONFIG_ATMEL_SPI 1 +#define CONFIG_SYS_HSDRAMC +#define CONFIG_MMC +#define CONFIG_ATMEL_MCI +#define CONFIG_ATMEL_SPI -#define CONFIG_SPI_FLASH 1 -#define CONFIG_SPI_FLASH_ATMEL 1 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL #define CONFIG_SYS_DCACHE_LINESZ 32 #define CONFIG_SYS_ICACHE_LINESZ 32 #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_BASE 0x00000000 #define CONFIG_SYS_FLASH_SIZE 0x800000 @@ -154,7 +154,7 @@ #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE #define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE -#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SIZE 65536 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) @@ -172,7 +172,7 @@ #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_SYS_LONGHELP #define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000) |