ENGR00301441-2 iMX6SX/SL: Modify SOC to support two ENET

iMX6SX has different enet system clocks with iMX6SL, and has two ENET
controllers. So update clocks and soc APIs accordingly to support this
features.

1. Modify the clock API "enable_fec_clock" to enable enet system clock
   for each enet controller.
2. Enet RGMII TX clock source may come from external or internal PLL.
   By default, use the external phy CLK_25M output as TX clock source.
   Add a configuration "CONFIG_FEC_CLOCK_FROM_ANATOP" for using internal
   PLL
3. Add clock API "fec_set_rate" to set the RGMII clocks from internal PLL.
4. Modify the MAC address function "imx_get_mac_from_fuse" to get either
   ENET MAC address.
5. Add clock API "enable_fec_25m_clock" to enable ENET 25Mhz reference clock.
6. Modify 17x17 arm2 BSP and imx6slevk BSP to fit the new APIs.

Signed-off-by: Fugang Duan  <B38611@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index aad4615..7bbb993 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -79,6 +79,7 @@
 #define CONFIG_FEC_XCV_TYPE             RMII
 #define CONFIG_ETHPRIME                 "FEC"
 #define CONFIG_FEC_MXC_PHYADDR          0
+#define CONFIG_FEC_CLOCK_FROM_ANATOP
 
 #define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC