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| author | Ye.Li <B37916@freescale.com> | 2014-03-10 16:13:19 +0800 |
|---|---|---|
| committer | Ye.Li <B37916@freescale.com> | 2014-03-10 17:50:37 +0800 |
| commit | 93f4a65f3c0fcd06dc39329d203ee822a24c7b11 (patch) | |
| tree | 197c3e1ece4e778804e66108f5e38cdacbb166bf /include/configs | |
| parent | 7ef25cd637b1ec9713427a871cb1c57e3cd2f8ce (diff) | |
| download | u-boot-imx-93f4a65f3c0fcd06dc39329d203ee822a24c7b11.zip u-boot-imx-93f4a65f3c0fcd06dc39329d203ee822a24c7b11.tar.gz u-boot-imx-93f4a65f3c0fcd06dc39329d203ee822a24c7b11.tar.bz2 | |
ENGR00302525 QuadSPI: Update driver to support 4 flash chips on each QSPI.
Add two configurations "CONFIG_QSPI_BASE" and "CONFIG_QSPI_MEMMAP_BASE"
for QSPI registers base and AHB memory base. So the driver is independent
from QSPI2. Use "bus" and "cs" parameters to denote 4 flash chip connected
on one QuadSPI:
SFA1: bus 0, cs 0
SFA2: bus 0, cs 1
SFB1: bus 1, cs 0
SFB2: bus 1, cs 1
Currently in uboot, the SPI flash framework does not have way to notify the
flash size to the driver. It brings a problem for QSPI driver to set the memory
map space of each chip. In this patch, we fix the mem map space of each chip
to 64MB(total is 256MB). So for flash larger than 64MB, driver only support
low 64MB.
Because u-boot SPI flash framework only supports 24bits address (16MB), the 64MB
limitation in driver is ok to work in u-boot.
Clean up the spi_xfer and spi read. Divide read to "IP read" and "AHB read".
In current implementation, the IPCR is still filled even reading from AHB
memory. This causes QSPI to read from flash twice, one to IP buffer, the
other to the AHB buffer.
Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'include/configs')
| -rwxr-xr-x | include/configs/mx6sx_arm2.h | 2 | ||||
| -rw-r--r-- | include/configs/mx6sxsabresd.h | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/include/configs/mx6sx_arm2.h b/include/configs/mx6sx_arm2.h index 6caa2b0..82a2352 100755 --- a/include/configs/mx6sx_arm2.h +++ b/include/configs/mx6sx_arm2.h @@ -98,6 +98,8 @@ #ifdef CONFIG_CMD_SPI #define CONFIG_QSPI /* enable the QUADSPI driver */ +#define CONFIG_QSPI_BASE QSPI2_BASE_ADDR +#define CONFIG_QSPI_MEMMAP_BASE QSPI2_ARB_BASE_ADDR #define CONFIG_HARD_SPI #define CONFIG_DEFAULT_SPI_BUS 0 diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index c4e2c9c..9db91cc 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -106,6 +106,8 @@ #ifdef CONFIG_CMD_SPI #define CONFIG_QSPI /* enable the QUADSPI driver */ +#define CONFIG_QSPI_BASE QSPI2_BASE_ADDR +#define CONFIG_QSPI_MEMMAP_BASE QSPI2_ARB_BASE_ADDR #define CONFIG_HARD_SPI #define CONFIG_DEFAULT_SPI_BUS 0 |