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| author | Anton Vorontsov <avorontsov@ru.mvista.com> | 2009-02-19 18:20:52 +0300 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2009-02-23 15:52:35 -0600 |
| commit | 7e91558032a0c1932dd7f4f562f9c7cc55efc496 (patch) | |
| tree | ba1a0a72c0c628bd7759789cd887fd8dbbe840d8 /include/configs | |
| parent | 50a4d08e8f31debbd4ea12caf1265f3643c38d5b (diff) | |
| download | u-boot-imx-7e91558032a0c1932dd7f4f562f9c7cc55efc496.zip u-boot-imx-7e91558032a0c1932dd7f4f562f9c7cc55efc496.tar.gz u-boot-imx-7e91558032a0c1932dd7f4f562f9c7cc55efc496.tar.bz2 | |
mpc83xx: MPC837XERDB: Add PCIe support
On MPC8377E-RDB and MPC8378E-RDB boards we have PCIe and mini-PCIe
slots. Let's support them.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/MPC837XERDB.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 2e31dd0..8d0c93b 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -49,6 +49,7 @@ #else #define CONFIG_83XX_CLKIN 66666667 /* in Hz */ #define CONFIG_83XX_GENERIC_PCI 1 +#define CONFIG_83XX_GENERIC_PCIE 1 #endif #ifndef CONFIG_SYS_CLK_FREQ @@ -375,6 +376,26 @@ #define CONFIG_SYS_PCI_SLV_MEM_BUS 0x00000000 #define CONFIG_SYS_PCI_SLV_MEM_SIZE 0x80000000 +#define CONFIG_SYS_PCIE1_BASE 0xA0000000 +#define CONFIG_SYS_PCIE1_CFG_BASE 0xA0000000 +#define CONFIG_SYS_PCIE1_CFG_SIZE 0x08000000 +#define CONFIG_SYS_PCIE1_MEM_BASE 0xA8000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS 0xA8000000 +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 +#define CONFIG_SYS_PCIE1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCIE1_IO_PHYS 0xB8000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000 + +#define CONFIG_SYS_PCIE2_BASE 0xC0000000 +#define CONFIG_SYS_PCIE2_CFG_BASE 0xC0000000 +#define CONFIG_SYS_PCIE2_CFG_SIZE 0x08000000 +#define CONFIG_SYS_PCIE2_MEM_BASE 0xC8000000 +#define CONFIG_SYS_PCIE2_MEM_PHYS 0xC8000000 +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 +#define CONFIG_SYS_PCIE2_IO_BASE 0x00000000 +#define CONFIG_SYS_PCIE2_IO_PHYS 0xD8000000 +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000 + #ifdef CONFIG_PCI #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ |