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| author | Michal Simek <monstr@monstr.eu> | 2008-03-28 11:04:01 +0100 |
|---|---|---|
| committer | Michal Simek <monstr@monstr.eu> | 2008-04-08 15:38:14 +0200 |
| commit | e5845e21224dbe2fe47b11f1cdf95de7f84be7cb (patch) | |
| tree | e481f0fb7bb9d7893cc33b1de4145b44cbee3afa /include/configs | |
| parent | 6bf3e982aefdb1daf9f5462d482c8f9d1cc90a57 (diff) | |
| download | u-boot-imx-e5845e21224dbe2fe47b11f1cdf95de7f84be7cb.zip u-boot-imx-e5845e21224dbe2fe47b11f1cdf95de7f84be7cb.tar.gz u-boot-imx-e5845e21224dbe2fe47b11f1cdf95de7f84be7cb.tar.bz2 | |
microblaze: ML401 and XUPV2P remove emac and emaclite reference
Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/ml401.h | 10 | ||||
| -rw-r--r-- | include/configs/xupv2p.h | 14 |
2 files changed, 18 insertions, 6 deletions
diff --git a/include/configs/ml401.h b/include/configs/ml401.h index b320438..6db1c1a 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -41,8 +41,14 @@ /*#define CFG_RESET_ADDRESS TEXT_BASE*/ /* ethernet */ -#define CONFIG_EMACLITE 1 -#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID +#ifdef XILINX_EMAC_BASEADDR +#define CONFIG_XILINX_EMAC 1 +#else +#ifdef XILINX_EMACLITE_BASEADDR +#define CONFIG_XILINX_EMACLITE 1 +#endif +#endif +#undef ET_DEBUG /* gpio */ #define CFG_GPIO_0 1 diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index c9320c2..eef4f72 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -36,10 +36,6 @@ #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } -/* ethernet */ -#define CONFIG_EMAC 1 -#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES - /* * setting reset address * @@ -51,6 +47,16 @@ */ /* #define CFG_RESET_ADDRESS 0x36000000 */ +/* ethernet */ +#ifdef XILINX_EMAC_BASEADDR +#define CONFIG_XILINX_EMAC 1 +#else +#ifdef XILINX_EMACLITE_BASEADDR +#define CONFIG_XILINX_EMACLITE 1 +#endif +#endif +#undef ET_DEBUG + /* gpio */ #ifdef XILINX_GPIO_BASEADDR #define CFG_GPIO_0 1 |