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authorYe Li <ye.li@nxp.com>2017-03-06 14:43:13 +0800
committerYe Li <ye.li@nxp.com>2017-04-05 14:05:05 +0800
commitd5f904fc3c48871e084fdcea9de38aa1c3579122 (patch)
treee7a2583e68beaaff3eb336f3796212bbeecaf07f /include/configs
parent24066e390f71de726d972c2cf4a2d9b9718f7d3d (diff)
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MLK-14326-3 mx6qsabreauto: Enable OF_CONTROL and DM driver
Enable OF_CONTROL and DM driver on mx6qsabreauto. 1. Add the imx6qsabreauto relevant DTS file for using DTB. 2. Modify PMIC initialization codes to use DM PMIC driver. 3. Modify to use PCA953X DM driver 4. Remove NAND from default, since the default imx6q-sabreauto.dts disabled the nand. The pins are conflicted with UART3, while UART3 is enabled. 5. For NAND build configuration, remove the USB, since the imx6q-sabreauto-gpmi-weim.dts will have pin conflicts on steer logic. 6. GPIO requests added. Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/mx6qsabreauto.h37
1 files changed, 19 insertions, 18 deletions
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index e71fac1..d7d5875 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -19,24 +19,6 @@
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#endif
-/*Since the pin conflicts on EIM D18, disable the USB host if the NOR flash is enabled */
-#if !defined(CONFIG_CMD_SF) && !defined(CONFIG_MTD_NOR_FLASH)
-/* USB Configs */
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_EHCI_MX6
-#define CONFIG_USB_HOST_ETHER
-#define CONFIG_USB_ETHER_ASIX
-#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
-#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_MXC_USB_FLAGS 0
-
-#define CONFIG_PCA953X
-#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} }
-#endif
-
-#define CONFIG_CMD_NAND
-
#include "mx6sabre_common.h"
#undef MFG_NAND_PARTITION
@@ -54,4 +36,23 @@
#define CONFIG_SF_DEFAULT_CS 1
#endif
+/*Since the pin conflicts on EIM D18, disable the USB host if the NOR flash is enabled */
+#ifdef CONFIG_USB
+/* USB Configs */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX6
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+
+#if !defined(CONFIG_DM_PCA953X) && defined(CONFIG_SYS_I2C)
+#define CONFIG_PCA953X
+#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} }
+#endif
+
+#endif
+
#endif /* __MX6QSABREAUTO_CONFIG_H */