MLK-14391-3 mx6sxarm2: Convert to enable OF_CONTROL and DM drivers

Update mx6sx 14x14/17x17/19x19 lpddr2/ddr3 arm2 board codes and build
configurations to enable OF_CONTROL and DM drivers.

1. Update GPIO codes for adding gpio request
2. Enable USB DM driver
3. Update PMIC code for using DM PMIC
4. Add spinor/qspi/nand/eimnor boot support.
5. Add defconfig for using plugin.
6. Enable Ethernet DM driver
7. Update for using QSPI DM driver

Signed-off-by: Ye Li <ye.li@nxp.com>

3 files changed, 62 insertions, 75 deletions

diff --git a/include/configs/mx6sx_17x17_arm2.h b/include/configs/mx6sx_17x17_arm2.h
index e99b5df..f2a9b27 100644
--- a/include/configs/mx6sx_17x17_arm2.h
+++ b/include/configs/mx6sx_17x17_arm2.h
@@ -11,13 +11,7 @@
 
 #include "mx6sx_arm2.h"
 
-#ifdef CONFIG_TARGET_MX6SX_14X14_ARM2
-#define CONFIG_DEFAULT_FDT_FILE		"imx6sx-14x14-arm2.dtb"
-#else
-#define CONFIG_DEFAULT_FDT_FILE		"imx6sx-17x17-arm2.dtb"
-#endif
-
-#ifdef CONFIG_SYS_USE_SPINOR  /* Pin conflict between SPI-NOR and SD2 */
+#ifdef CONFIG_MXC_SPI  /* Pin conflict between SPI-NOR and SD2 */
 #define CONFIG_SYS_FSL_USDHC_NUM    2
 #define CONFIG_SYS_MMC_ENV_DEV		0   /* USDHC3 */
 #define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
@@ -29,7 +23,7 @@
 #define CONFIG_MMCROOT			"/dev/mmcblk2p2"  /* USDHC3 */
 #endif
 
-#ifdef CONFIG_SYS_USE_EIMNOR
+#ifdef CONFIG_MXC_SPI
 #undef CONFIG_SYS_FLASH_SECT_SIZE
 #undef CONFIG_SYS_MAX_FLASH_SECT
 #define CONFIG_SYS_FLASH_SECT_SIZE	(256 * 1024)
diff --git a/include/configs/mx6sx_19x19_arm2.h b/include/configs/mx6sx_19x19_arm2.h
index ec6a421..4abb2ef 100644
--- a/include/configs/mx6sx_19x19_arm2.h
+++ b/include/configs/mx6sx_19x19_arm2.h
@@ -9,12 +9,12 @@
 #ifndef __MX6SX_19X19_ARM2_CONFIG_H
 #define __MX6SX_19X19_ARM2_CONFIG_H
 
-#define CONFIG_VIDEO
+#ifdef CONFIG_VIDEO
 #define CONFIG_VIDEO_GIS
+#endif
 
 #include "mx6sx_arm2.h"
 
-#define CONFIG_DEFAULT_FDT_FILE		"imx6sx-19x19-arm2.dtb"
 #define CONFIG_SYS_FSL_USDHC_NUM    1
 #define CONFIG_SYS_MMC_ENV_DEV		0   /* USDHC1 */
 #define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
diff --git a/include/configs/mx6sx_arm2.h b/include/configs/mx6sx_arm2.h
index 0601d44..1c420d3 100644
--- a/include/configs/mx6sx_arm2.h
+++ b/include/configs/mx6sx_arm2.h
@@ -27,9 +27,6 @@
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
 
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_MII
 #define CONFIG_FEC_MXC
 #define CONFIG_MII
 #define IMX_FEC_BASE			ENET_BASE_ADDR
@@ -41,35 +38,39 @@
 #define CONFIG_PHY_ATHEROS
 
 /* I2C configs */
-#define CONFIG_CMD_I2C
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
+#endif
+#ifdef CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_SPEED		100000
 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
-
-#define CONFIG_FEC_ENABLE_MAX7322
-/* MAX7322 */
-#ifdef CONFIG_FEC_ENABLE_MAX7322
-#define CONFIG_MAX7322_I2C_ADDR		0x68
-#define CONFIG_MAX7322_I2C_BUS		1
 #endif
 
 /* PMIC */
+#ifndef CONFIG_DM_PMIC
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C
 #define CONFIG_POWER_PFUZE100
 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
+#endif
 
+#ifdef CONFIG_CMD_BOOTAUX
+#ifdef CONFIG_DM_SPI
 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000 /* Set to QSPI2 B flash at default */
-#define CONFIG_CMD_BOOTAUX /* Boot M4 */
+#define SF_QSPI2_B_CS_NUM 2
+#else
+#define CONFIG_SYS_AUXCORE_BOOTDATA 0x72000000 /* Set to QSPI2 B flash at default */
+#define SF_QSPI2_B_CS_NUM 1
+#endif
 
-#ifdef CONFIG_CMD_BOOTAUX
 #define UPDATE_M4_ENV \
 	"m4image=m4_qspi.bin\0" \
+	"m4_qspi_cs="__stringify(SF_QSPI2_B_CS_NUM)"\0" \
 	"loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
 	"update_m4_from_sd=" \
-		"if sf probe 1:0; then " \
+		"if sf probe 1:${m4_qspi_cs}; then " \
 			"if run loadm4image; then " \
 				"setexpr fw_sz ${filesize} + 0xffff; " \
 				"setexpr fw_sz ${fw_sz} / 0x10000; "	\
@@ -78,19 +79,19 @@
 				"sf write ${loadaddr} 0x0 ${filesize}; " \
 			"fi; " \
 		"fi\0" \
-	"m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
+	"m4boot=sf probe 1:${m4_qspi_cs}; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
 #else
 #define UPDATE_M4_ENV ""
 #endif
 
 #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-#ifdef CONFIG_SYS_BOOT_NAND
+#ifdef CONFIG_NAND_BOOT
 #define MFG_NAND_PARTITION "mtdparts=gpmi-nand:64m(boot),16m(kernel),16m(dtb),1m(misc),-(rootfs) "
 #else
 #define MFG_NAND_PARTITION ""
 #endif
 
-#define MFG_ENV_SETTINGS \
+#define CONFIG_MFG_ENV_SETTINGS \
 	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
 		"rdinit=/linuxrc " \
 		"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
@@ -103,10 +104,10 @@
 	"initrd_high=0xffffffff\0" \
 	"bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
 
-#if defined(CONFIG_SYS_BOOT_NAND)
+#if defined(CONFIG_NAND_BOOT)
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	CONFIG_MFG_ENV_SETTINGS \
-	"panel=Hannstar-XGA\0"
+	"panel=Hannstar-XGA\0" \
 	"fdt_addr=0x83000000\0" \
 	"fdt_high=0xffffffff\0"	  \
 	"console=ttymxc0\0" \
@@ -121,7 +122,7 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	CONFIG_MFG_ENV_SETTINGS \
 	UPDATE_M4_ENV \
-	"panel=Hannstar-XGA\0"
+	"panel=Hannstar-XGA\0" \
 	"script=boot.scr\0" \
 	"image=zImage\0" \
 	"console=ttymxc0\0" \
@@ -197,7 +198,6 @@
 	   "else run netboot; fi"
 #endif
 
-#define CONFIG_CMD_MEMTEST
 #define CONFIG_SYS_MEMTEST_START	0x80000000
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000)
 
@@ -221,49 +221,40 @@
 
 #define CONFIG_ENV_SIZE			SZ_8K
 
-#ifdef CONFIG_SYS_BOOT_QSPI
-#define CONFIG_FSL_QSPI
+#ifdef CONFIG_QSPI_BOOT
 #define CONFIG_ENV_IS_IN_SPI_FLASH
-#elif defined CONFIG_SYS_BOOT_NAND
-#define CONFIG_SYS_USE_NAND
+#elif defined CONFIG_NAND_BOOT
+#define CONFIG_CMD_NAND
 #define CONFIG_ENV_IS_IN_NAND
-#elif defined CONFIG_SYS_BOOT_SPINOR
-#define CONFIG_SYS_USE_SPINOR
+#elif defined CONFIG_SPI_BOOT
+#define CONFIG_MXC_SPI
 #define CONFIG_ENV_IS_IN_SPI_FLASH
-#elif defined CONFIG_SYS_BOOT_EIMNOR
-#define CONFIG_SYS_USE_EIMNOR
+#elif defined CONFIG_NOR_BOOT
+#define CONFIG_MTD_NOR_FLASH
 #define CONFIG_ENV_IS_IN_FLASH
 #else
-#define CONFIG_FSL_QSPI   /* Enable the QSPI flash at default */
 #define CONFIG_ENV_IS_IN_MMC
 #endif
 
 #ifdef CONFIG_FSL_QSPI
-#define CONFIG_QSPI_BASE		QSPI1_BASE_ADDR
-#define CONFIG_QSPI_MEMMAP_BASE		QSPI1_AMBA_BASE
-
-#define CONFIG_CMD_SF
-#define	CONFIG_SPI_FLASH
-#define	CONFIG_SPI_FLASH_STMICRO
-#define	CONFIG_SPI_FLASH_BAR
-#define	CONFIG_SF_DEFAULT_BUS		0
-#define	CONFIG_SF_DEFAULT_CS		0
-#define	CONFIG_SF_DEFAULT_SPEED		40000000
-#define	CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
+#define CONFIG_SYS_FSL_QSPI_AHB
+#define FSL_QSPI_FLASH_SIZE		SZ_32M
+#define FSL_QSPI_FLASH_NUM		2
+#define CONFIG_SF_DEFAULT_BUS		1
+#define CONFIG_SF_DEFAULT_CS		0
+#define CONFIG_SF_DEFAULT_SPEED	40000000
+#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
 #endif
 
-#ifdef CONFIG_SYS_USE_SPINOR
-#define CONFIG_CMD_SF
-#define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_STMICRO
-#define CONFIG_MXC_SPI
+
+#ifdef CONFIG_MXC_SPI
 #define CONFIG_SF_DEFAULT_BUS  3
 #define CONFIG_SF_DEFAULT_SPEED 20000000
 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
 #define CONFIG_SF_DEFAULT_CS   0
 #endif
 
-#ifdef CONFIG_SYS_USE_EIMNOR
+#ifdef CONFIG_NOR_BOOT
 #define CONFIG_SYS_FLASH_BASE           WEIM_ARB_BASE_ADDR
 #define CONFIG_SYS_FLASH_SECT_SIZE	(128 * 1024)
 #define CONFIG_SYS_MAX_FLASH_BANKS 1    /* max number of memory banks */
@@ -274,8 +265,7 @@
 #define CONFIG_SYS_FLASH_EMPTY_INFO
 #endif
 
-#ifdef CONFIG_SYS_USE_NAND
-#define CONFIG_CMD_NAND
+#ifdef CONFIG_CMD_NAND
 #define CONFIG_CMD_NAND_TRIMFFS
 
 /* NAND stuff */
@@ -293,9 +283,9 @@
 
 
 #if defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_ENV_OFFSET		(12 * SZ_64K)
+#define CONFIG_ENV_OFFSET		(13 * SZ_64K)
 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
-#define CONFIG_ENV_OFFSET		(768 * 1024)
+#define CONFIG_ENV_OFFSET		(832 * 1024)
 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
@@ -316,37 +306,40 @@
 #define CONFIG_CMD_BMODE
 
 #ifdef CONFIG_VIDEO
-#define	CONFIG_CFB_CONSOLE
-#define	CONFIG_VIDEO_MXS
-#define	CONFIG_VIDEO_LOGO
-#define	CONFIG_VIDEO_SW_CURSOR
-#define	CONFIG_VGA_AS_SINGLE_DEVICE
-#define	CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define	CONFIG_SPLASH_SCREEN
+#define CONFIG_VIDEO_MXS
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_SPLASH_SCREEN
 #define CONFIG_SPLASH_SCREEN_ALIGN
-#define	CONFIG_CMD_BMP
-#define	CONFIG_BMP_16BPP
-#define	CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_BMP_RLE8
 #define CONFIG_VIDEO_BMP_LOGO
+#define CONFIG_IMX_VIDEO_SKIP
+#define CONFIG_SYS_CONSOLE_BG_COL            0x00
+#define CONFIG_SYS_CONSOLE_FG_COL            0xa0
 #ifdef CONFIG_VIDEO_GIS
 #define CONFIG_VIDEO_CSI
 #define CONFIG_VIDEO_PXP
 #define CONFIG_VIDEO_VADC
-#define CONFIG_IMX_VIDEO_SKIP
 #endif
 #endif
 
+
 /* USB Configs */
-#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
+#endif
+
+#ifndef CONFIG_DM_USB
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_MX6
 #define CONFIG_USB_STORAGE
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_USB_HOST_ETHER
-#define CONFIG_USB_ETHER_ASIX
-#define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS   0
 /*Only enable OTG1, the OTG2 has pin conflicts with PWM and WDOG*/
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#endif
 
 #endif				/* __CONFIG_H */