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authorWolfgang Denk <wd@denx.de>2011-12-23 20:53:58 +0100
committerWolfgang Denk <wd@denx.de>2011-12-23 20:53:58 +0100
commitbfcc40bb09b05c90cc3b1496abb270eb8aa72134 (patch)
treec551fbe329411533b80f0298f6f0ff5afb48cee7 /include/configs
parentcba9a894fdb1cb49b60fcd1d1d6919cbd7995dd5 (diff)
parent1895420b2ef7358014b355aa4f4f2c348267a6d9 (diff)
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Merge branch 'next' of ../next
* 'next' of ../next: mkenvimage: Add version info switch (-V) mkenvimage: Fix getopt() error handling mkenvimage: Fix some typos phy: add Micrel KS8721BL phy definition net: introduce per device index mvgbe: remove setting of ethaddr within the driver x86: Add support for specifying an initrd with the zboot command x86: Refactor the zboot innards so they can be reused with a vboot image x86: Add infrastructure to extract an e820 table from the coreboot tables x86: Add support for booting Linux using the 32 bit boot protocol x86: Clean up the x86 zimage code in preparation to extend it x86: Import code from coreboot's libpayload to parse the coreboot table x86: Initial commit for running as a coreboot payload CHECKPATCH: ./board/esd/hh405/logo_320_240_8bpp.c CHECKPATCH: ./board/esd/hh405/logo_1024_768_8bpp.c CHECKPATCH: ./board/esd/hh405/logo_320_240_4bpp.c CHECKPATCH: ./board/esd/hh405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/apc405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/voh405/logo_320_240_4bpp.c CHECKPATCH: ./board/esd/voh405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/hh405/fpgadata.c CHECKPATCH: ./board/esd/pci405/fpgadata.c CHECKPATCH: ./board/esd/tasreg/fpgadata.c CHECKPATCH: ./board/esd/apc405/fpgadata.c CHECKPATCH: ./board/esd/voh405/fpgadata.c CHECKPATCH: ./board/esd/ash405/fpgadata.c CHECKPATCH: ./board/esd/dasa_sim/fpgadata.c CHECKPATCH: ./board/esd/ar405/fpgadata_xl30.c CHECKPATCH: ./board/esd/ar405/fpgadata.c CHECKPATCH: ./board/esd/plu405/fpgadata.c CHECKPATCH: ./board/esd/wuh405/fpgadata.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405ab.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci4052.c CHECKPATCH: ./board/esd/canbt/fpgadata.c CHECKPATCH: ./board/esd/du405/fpgadata.c CHECKPATCH: ./board/esd/cpciiser4/fpgadata.c CHECKPATCH: ./board/dave/PPChameleonEVB/fpgadata.c avr32:mmu.c: fix printf() length modifier fat.c: fix printf() length modifier cmd_sf.c: fix printf() length modifier Make printf and vprintf safe from buffer overruns vsprintf: Move function documentation into header file Add safe vsnprintf and snprintf library functions Move vsprintf functions into their own header Conflicts: tools/mkenvimage.c Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/coreboot.h225
1 files changed, 225 insertions, 0 deletions
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
new file mode 100644
index 0000000..348a25b
--- /dev/null
+++ b/include/configs/coreboot.h
@@ -0,0 +1,225 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * (C) Copyright 2008
+ * Graeme Russ, graeme.russ@gmail.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/ibmpc.h>
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_SYS_COREBOOT
+#undef CONFIG_SHOW_BOOT_PROGRESS
+#define CONFIG_LAST_STAGE_INIT
+
+
+/*-----------------------------------------------------------------------
+ * Watchdog Configuration
+ */
+#undef CONFIG_WATCHDOG
+#undef CONFIG_HW_WATCHDOG
+
+/*-----------------------------------------------------------------------
+ * Real Time Clock Configuration
+ */
+#define CONFIG_RTC_MC146818
+#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
+
+/*-----------------------------------------------------------------------
+ * Serial Configuration
+ */
+#define CONFIG_SERIAL_MULTI
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK 1843200
+#define CONFIG_BAUDRATE 9600
+#define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \
+ 9600, 19200, 38400, 115200}
+#define CONFIG_SYS_NS16550_COM1 UART0_BASE
+#define CONFIG_SYS_NS16550_COM2 UART1_BASE
+#define CONFIG_SYS_NS16550_PORT_MAPPED
+
+/* max. 1 IDE bus */
+#define CONFIG_SYS_IDE_MAXBUS 1
+/* max. 1 drive per IDE bus */
+#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1)
+
+#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
+#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
+#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170
+#define CONFIG_SYS_ATA_DATA_OFFSET 0
+#define CONFIG_SYS_ATA_REG_OFFSET 0
+#define CONFIG_SYS_ATA_ALT_OFFSET 0x200
+
+
+#define CONFIG_SUPPORT_VFAT
+/************************************************************
+ * ATAPI support (experimental)
+ ************************************************************/
+#define CONFIG_ATAPI
+
+/************************************************************
+ * DISK Partition support
+ ************************************************************/
+#define CONFIG_DOS_PARTITION
+#define CONFIG_MAC_PARTITION
+#define CONFIG_ISO_PARTITION /* Experimental */
+
+
+/*-----------------------------------------------------------------------
+ * Video Configuration
+ */
+#undef CONFIG_VIDEO
+#undef CONFIG_CFB_CONSOLE
+
+/*-----------------------------------------------------------------------
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_CONSOLE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ECHO
+#undef CONFIG_CMD_FLASH
+#define CONFIG_CMD_FPGA
+#define CONFIG_CMD_IMI
+#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ITEST
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_SAVEENV
+#define CONFIG_CMD_SETGETDCR
+#define CONFIG_CMD_SOURCE
+#define CONFIG_CMD_XIMG
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+
+#define CONFIG_BOOTDELAY 2
+#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 115200
+#define CONFIG_KGDB_SER_INDEX 2
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT "boot > "
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + \
+ 16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_MEMTEST_START 0x00100000
+#define CONFIG_SYS_MEMTEST_END 0x01000000
+#define CONFIG_SYS_LOAD_ADDR 0x100000
+#define CONFIG_SYS_HZ 1000
+#define CONFIG_SYS_X86_ISR_TIMER
+
+/*-----------------------------------------------------------------------
+ * SDRAM Configuration
+ */
+#define CONFIG_NR_DRAM_BANKS 4
+
+/* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
+#undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
+#undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
+#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
+#undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
+
+/*-----------------------------------------------------------------------
+ * CPU Features
+ */
+
+#define CONFIG_SYS_GENERIC_TIMER
+#define CONFIG_SYS_PCAT_INTERRUPTS
+#define CONFIG_SYS_NUM_IRQS 16
+
+/*-----------------------------------------------------------------------
+ * Memory organization:
+ * 32kB Stack
+ * 16kB Cache-As-RAM @ 0x19200000
+ * 256kB Monitor
+ * (128kB + Environment Sector Size) malloc pool
+ */
+#define CONFIG_SYS_STACK_SIZE (32 * 1024)
+#define CONFIG_SYS_INIT_SP_ADDR (256 * 1024 + 16 * 1024)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024)
+/* Address of temporary Global Data */
+#define CONFIG_SYS_INIT_GD_ADDR (256 * 1024)
+
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/*-----------------------------------------------------------------------
+ * FLASH configuration
+ */
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_MAX_FLASH_SECT 1
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+
+/*-----------------------------------------------------------------------
+ * Environment configuration
+ */
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE 0x01000
+
+/*-----------------------------------------------------------------------
+ * PCI configuration
+ */
+#define CONFIG_PCI
+
+/*-----------------------------------------------------------------------
+ * Network device support
+ */
+#define CONFIG_NET_MULTI
+
+
+#endif /* __CONFIG_H */