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| author | Dirk Eibach <dirk.eibach@gdsys.cc> | 2014-07-03 09:28:18 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-07-07 19:47:18 -0400 |
| commit | b46226bdb5a1690756daf77c42bdec91194927b0 (patch) | |
| tree | 94e84a2ef2c216b7eff3134ba011b6e8c5de440e /include/configs | |
| parent | edfe9fea7ce0a1cfde67712a67f88b601eb7803f (diff) | |
| download | u-boot-imx-b46226bdb5a1690756daf77c42bdec91194927b0.zip u-boot-imx-b46226bdb5a1690756daf77c42bdec91194927b0.tar.gz u-boot-imx-b46226bdb5a1690756daf77c42bdec91194927b0.tar.bz2 | |
i2c: IHS I2C master driver
IHS I2C master support was merely a hack in the osd driver.
Now it is a proper u-boot I2C framework driver, supporting the
v2.00 master features.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/dlvision-10g.h | 11 | ||||
| -rw-r--r-- | include/configs/iocon.h | 23 |
2 files changed, 29 insertions, 5 deletions
diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 7877897..05a97bf 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -99,7 +99,18 @@ */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 100000 +#define CONFIG_SYS_I2C_IHS +#define CONFIG_SYS_I2C_IHS_CH0 +#define CONFIG_SYS_I2C_IHS_SPEED_0 50000 +#define CONFIG_SYS_I2C_IHS_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_IHS_CH1 +#define CONFIG_SYS_I2C_IHS_SPEED_1 50000 +#define CONFIG_SYS_I2C_IHS_SLAVE_1 0x7F + +#define CONFIG_SYS_SPD_BUS_NUM 2 + /* Temp sensor/hwmon/dtt */ +#define CONFIG_SYS_DTT_BUS_NUM 2 #define CONFIG_DTT_LM63 1 /* National LM63 */ #define CONFIG_DTT_SENSORS { 0x4c, 0x4e, 0x18 } /* Sensor addresses */ #define CONFIG_DTT_PWM_LOOKUPTABLE \ diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 5636f38..36b4b55 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -99,12 +99,27 @@ #define CONFIG_SYS_I2C_PPC4XX_CH0 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_IHS #define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_SYS_SPD_BUS_NUM 4 #define CONFIG_PCA953X /* NXP PCA9554 */ #define CONFIG_PCA9698 /* NXP PCA9698 */ +#define CONFIG_SYS_I2C_IHS_CH0 +#define CONFIG_SYS_I2C_IHS_SPEED_0 50000 +#define CONFIG_SYS_I2C_IHS_SLAVE_0 0x7F +#define CONFIG_SYS_I2C_IHS_CH1 +#define CONFIG_SYS_I2C_IHS_SPEED_1 50000 +#define CONFIG_SYS_I2C_IHS_SLAVE_1 0x7F +#define CONFIG_SYS_I2C_IHS_CH2 +#define CONFIG_SYS_I2C_IHS_SPEED_2 50000 +#define CONFIG_SYS_I2C_IHS_SLAVE_2 0x7F +#define CONFIG_SYS_I2C_IHS_CH3 +#define CONFIG_SYS_I2C_IHS_SPEED_3 50000 +#define CONFIG_SYS_I2C_IHS_SLAVE_3 0x7F + /* * Software (bit-bang) I2C driver configuration */ @@ -121,9 +136,9 @@ #define CONFIG_SYS_I2C_SOFT_SPEED_4 50000 #define CONFIG_SYS_I2C_SOFT_SLAVE_4 0x7F -#define CONFIG_SYS_ICS8N3QV01_I2C {1, 2, 3, 4} -#define CONFIG_SYS_CH7301_I2C {1, 2, 3, 4} -#define CONFIG_SYS_DP501_I2C {1, 2, 3, 4} +#define CONFIG_SYS_ICS8N3QV01_I2C {5, 6, 7, 8} +#define CONFIG_SYS_CH7301_I2C {5, 6, 7, 8} +#define CONFIG_SYS_DP501_I2C {0, 1, 2, 3} #ifndef __ASSEMBLY__ void fpga_gpio_set(unsigned int bus, int pin); @@ -148,8 +163,6 @@ int fpga_gpio_get(unsigned int bus, int pin); fpga_gpio_set(I2C_ADAP_HWNR, 0x0020); \ else \ fpga_gpio_clear(I2C_ADAP_HWNR, 0x0020); \ - while (!!fpga_gpio_get(I2C_ADAP_HWNR, 0x0020) != !!bit) \ - ; \ } while (0) #define I2C_DELAY udelay(25) /* 1/4 I2C clock duration */ |