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authorPeng Fan <peng.fan@nxp.com>2016-05-16 15:38:07 +0800
committerPeng Fan <peng.fan@nxp.com>2016-05-16 17:22:31 +0800
commit68fbb20f0db35e533488fd3b1c8ace8c880b2212 (patch)
tree4d6125de89fca2735bc6601128b48b5f4d0e9512 /include/configs
parent1f0bb3940876c9b0be6f3c5fc320dde81ced4d97 (diff)
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MLK-12798 imx6ull: fix snvs tamper pin usage
SNVS TAMPER pin and BOOT MODE pins are in SNVS IOMUXC module, not in IOMUXC, so correct the related registers' offset. Use IOMUX_CONFIG_LPSR flag for these pins, so we can differentiate them from iomuxc pins. Define CONFIG_IOMUX_LPSR for mx6ull_ddr3_arm2 board to enable using these pins. Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/mx6ull_ddr3_arm2.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/mx6ull_ddr3_arm2.h b/include/configs/mx6ull_ddr3_arm2.h
index 89f6284..9e20d33 100644
--- a/include/configs/mx6ull_ddr3_arm2.h
+++ b/include/configs/mx6ull_ddr3_arm2.h
@@ -32,6 +32,8 @@
#include "mx6ul_arm2.h"
+#define CONFIG_IOMUX_LPSR
+
#define PHYS_SDRAM_SIZE SZ_1G
#ifdef CONFIG_SYS_USE_SPINOR