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authorWolfgang Denk <wd@denx.de>2009-04-02 00:24:33 +0200
committerWolfgang Denk <wd@denx.de>2009-04-02 00:24:33 +0200
commitdfc91c33957c95da34e3888dc87912d5c15a7603 (patch)
treed5fd6bd3818d817ea618bb9c19330633a71ab1bb /include/configs
parentc123098035be8bae3859bbfbd06861f197c07631 (diff)
parent0fc4f64c59873a47d555dd66bad25797d4ecb0ed (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/ADNPESC1.h1
-rw-r--r--include/configs/B2.h6
-rw-r--r--include/configs/DK1C20.h1
-rw-r--r--include/configs/DK1S10.h1
-rw-r--r--include/configs/EXBITGEN.h2
-rw-r--r--include/configs/SMN42.h3
-rw-r--r--include/configs/SX1.h8
-rw-r--r--include/configs/VCMA9.h4
-rw-r--r--include/configs/W7OLMC.h2
-rw-r--r--include/configs/W7OLMG.h2
-rw-r--r--include/configs/actux1.h2
-rw-r--r--include/configs/actux2.h2
-rw-r--r--include/configs/actux3.h2
-rw-r--r--include/configs/actux4.h2
-rw-r--r--include/configs/apollon.h7
-rw-r--r--include/configs/armadillo.h3
-rw-r--r--include/configs/assabet.h3
-rw-r--r--include/configs/cerf250.h2
-rw-r--r--include/configs/cm4008.h3
-rw-r--r--include/configs/cm41xx.h3
-rw-r--r--include/configs/cradle.h2
-rw-r--r--include/configs/csb226.h2
-rw-r--r--include/configs/csb272.h1
-rw-r--r--include/configs/csb472.h1
-rw-r--r--include/configs/davinci_dvevm.h1
-rw-r--r--include/configs/davinci_schmoogie.h1
-rw-r--r--include/configs/davinci_sffsdr.h1
-rw-r--r--include/configs/davinci_sonata.h1
-rw-r--r--include/configs/delta.h2
-rw-r--r--include/configs/dnp1110.h3
-rw-r--r--include/configs/eNET.h2
-rw-r--r--include/configs/ep7312.h3
-rw-r--r--include/configs/evb4510.h2
-rw-r--r--include/configs/gcplus.h3
-rw-r--r--include/configs/hymod.h2
-rw-r--r--include/configs/impa7.h3
-rw-r--r--include/configs/innokom.h2
-rw-r--r--include/configs/integratorap.h1
-rw-r--r--include/configs/integratorcp.h1
-rw-r--r--include/configs/ixdp425.h2
-rw-r--r--include/configs/ixdpg425.h1
-rw-r--r--include/configs/lart.h3
-rw-r--r--include/configs/logodl.h2
-rw-r--r--include/configs/lpc2292sodimm.h3
-rw-r--r--include/configs/lpd7a400.h2
-rw-r--r--include/configs/lpd7a404.h2
-rw-r--r--include/configs/lubbock.h2
-rw-r--r--include/configs/modnet50.h3
-rw-r--r--include/configs/mx1ads.h2
-rw-r--r--include/configs/mx1fs2.h5
-rw-r--r--include/configs/netstar.h35
-rw-r--r--include/configs/nmdk8815.h1
-rw-r--r--include/configs/ns9750dev.h2
-rw-r--r--include/configs/omap1510inn.h8
-rw-r--r--include/configs/omap1610h2.h6
-rw-r--r--include/configs/omap1610inn.h6
-rw-r--r--include/configs/omap2420h4.h12
-rw-r--r--include/configs/omap3_beagle.h8
-rw-r--r--include/configs/omap3_evm.h9
-rw-r--r--include/configs/omap3_overo.h9
-rw-r--r--include/configs/omap3_pandora.h9
-rw-r--r--include/configs/omap3_zoom1.h8
-rw-r--r--include/configs/omap5912osk.h6
-rw-r--r--include/configs/omap730p2.h9
-rw-r--r--include/configs/pdnb3.h1
-rw-r--r--include/configs/pleb2.h2
-rw-r--r--include/configs/pxa255_idp.h2
-rw-r--r--include/configs/sbc2410x.h4
-rw-r--r--include/configs/sc520_cdp.h2
-rw-r--r--include/configs/sc520_spunk.h2
-rw-r--r--include/configs/scb9328.h3
-rw-r--r--include/configs/shannon.h3
-rw-r--r--include/configs/smdk2400.h3
-rw-r--r--include/configs/smdk2410.h3
-rw-r--r--include/configs/smdk6400.h1
-rw-r--r--include/configs/trab.h3
-rw-r--r--include/configs/trizepsiv.h2
-rw-r--r--include/configs/versatile.h1
-rw-r--r--include/configs/voiceblue.h8
-rw-r--r--include/configs/wepep250.h2
-rw-r--r--include/configs/xaeniax.h2
-rw-r--r--include/configs/xm250.h2
-rw-r--r--include/configs/xsengine.h1
-rw-r--r--include/configs/zylonite.h2
84 files changed, 88 insertions, 209 deletions
diff --git a/include/configs/ADNPESC1.h b/include/configs/ADNPESC1.h
index 0977bee..b8afc17 100644
--- a/include/configs/ADNPESC1.h
+++ b/include/configs/ADNPESC1.h
@@ -44,7 +44,6 @@
#define CONFIG_ADNPESC1 1 /* SSV ADNP/ESC1 board */
#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */
#define CONFIG_SYS_HZ 1000 /* 1 msec time tick */
-#undef CONFIG_SYS_CLKS_IN_HZ
#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
/*------------------------------------------------------------------------
diff --git a/include/configs/B2.h b/include/configs/B2.h
index c77ea1f..01b65c5 100644
--- a/include/configs/B2.h
+++ b/include/configs/B2.h
@@ -65,8 +65,12 @@
/*
* select serial console configuration
*/
+#define CONFIG_S3C44B0_SERIAL
#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
+#define CONFIG_S3C44B0_I2C
+#define CONFIG_RTC_S3C44B0
+
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
@@ -116,8 +120,6 @@
#define CONFIG_SYS_MEMTEST_START 0x0C400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x0c700000 /* default load address */
#define CONFIG_SYS_HZ 1000 /* 1 kHz */
diff --git a/include/configs/DK1C20.h b/include/configs/DK1C20.h
index db9c17d..45ff2f7 100644
--- a/include/configs/DK1C20.h
+++ b/include/configs/DK1C20.h
@@ -50,7 +50,6 @@
#define CONFIG_DK1C20 1 /* Cyclone DK-1C20 board*/
#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */
#define CONFIG_SYS_HZ 1000 /* 1 msec time tick */
-#undef CONFIG_SYS_CLKS_IN_HZ
#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
/*------------------------------------------------------------------------
diff --git a/include/configs/DK1S10.h b/include/configs/DK1S10.h
index 3bd270c..ae567a3 100644
--- a/include/configs/DK1S10.h
+++ b/include/configs/DK1S10.h
@@ -48,7 +48,6 @@
#define CONFIG_DK1S10 1 /* Stratix DK-1S10 board*/
#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_NIOS_CPU_CLK/* 50 MHz core clock */
#define CONFIG_SYS_HZ 1000 /* 1 msec time tick */
-#undef CONFIG_SYS_CLKS_IN_HZ
#define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
/*------------------------------------------------------------------------
diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h
index 1dd6e57..4729464 100644
--- a/include/configs/EXBITGEN.h
+++ b/include/configs/EXBITGEN.h
@@ -129,8 +129,6 @@
{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
57600, 115200, 230400, 460800, 921600 }
-#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
diff --git a/include/configs/SMN42.h b/include/configs/SMN42.h
index 45e6a58..05f6d9f 100644
--- a/include/configs/SMN42.h
+++ b/include/configs/SMN42.h
@@ -59,6 +59,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_LPC2292_SERIAL
#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */
@@ -139,8 +140,6 @@
#define CONFIG_SYS_MEMTEST_START 0x81800000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x83000000 /* 24 MB in SRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
/* for uClinux img is here*/
diff --git a/include/configs/SX1.h b/include/configs/SX1.h
index 78c5152..caa6592 100644
--- a/include/configs/SX1.h
+++ b/include/configs/SX1.h
@@ -133,16 +133,14 @@
#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
* This time is further subdivided by a local divisor.
*/
-#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
-#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index d9bcf6b..5e614fd 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -117,6 +117,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_S3C24X0_SERIAL
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
/************************************************************
@@ -172,9 +173,6 @@
#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_SYS_LOAD_ADDR 0x30800000 /* default load address */
-
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
/* we configure PWM Timer 4 to 1us ~ 1MHz */
/*#define CONFIG_SYS_HZ 1000000 */
#define CONFIG_SYS_HZ 1562500
diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h
index 51d0a0a..ceef76e 100644
--- a/include/configs/W7OLMC.h
+++ b/include/configs/W7OLMC.h
@@ -131,8 +131,6 @@
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE {9600}
-#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info (bd_t) */
diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h
index ca1a9d4..11e0630 100644
--- a/include/configs/W7OLMG.h
+++ b/include/configs/W7OLMG.h
@@ -139,8 +139,6 @@
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE {9600}
-#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info (bd_t) */
diff --git a/include/configs/actux1.h b/include/configs/actux1.h
index adbc399..91f6ff0 100644
--- a/include/configs/actux1.h
+++ b/include/configs/actux1.h
@@ -95,8 +95,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00400000
#define CONFIG_SYS_MEMTEST_END 0x00800000
-/* everything, incl board info, in Hz */
-#undef CONFIG_SYS_CLKS_IN_HZ
/* spec says 66.666 MHz, but it appears to be 33 */
#define CONFIG_SYS_HZ 3333333
diff --git a/include/configs/actux2.h b/include/configs/actux2.h
index 4c579eb..b936938 100644
--- a/include/configs/actux2.h
+++ b/include/configs/actux2.h
@@ -86,8 +86,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00400000
#define CONFIG_SYS_MEMTEST_END 0x00800000
-/* everything, incl board info, in Hz */
-#undef CONFIG_SYS_CLKS_IN_HZ
/* spec says 66.666 MHz, but it appears to be 33 */
#define CONFIG_SYS_HZ 3333333
diff --git a/include/configs/actux3.h b/include/configs/actux3.h
index 694f522..f5ee899 100644
--- a/include/configs/actux3.h
+++ b/include/configs/actux3.h
@@ -84,8 +84,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00400000
#define CONFIG_SYS_MEMTEST_END 0x00800000
-/* everything, incl board info, in Hz */
-#undef CONFIG_SYS_CLKS_IN_HZ
/* spec says 66.666 MHz, but it appears to be 33 */
#define CONFIG_SYS_HZ 3333333
diff --git a/include/configs/actux4.h b/include/configs/actux4.h
index cdc9956..8d70a26 100644
--- a/include/configs/actux4.h
+++ b/include/configs/actux4.h
@@ -83,8 +83,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00400000
#define CONFIG_SYS_MEMTEST_END 0x00800000
-/* everything, incl board info, in Hz */
-#undef CONFIG_SYS_CLKS_IN_HZ
/* spec says 66.666 MHz, but it appears to be 33 */
#define CONFIG_SYS_HZ 3333333
diff --git a/include/configs/apollon.h b/include/configs/apollon.h
index f83dd9c..04da083 100644
--- a/include/configs/apollon.h
+++ b/include/configs/apollon.h
@@ -196,7 +196,6 @@
#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M)
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
/* default load address */
#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0)
@@ -204,11 +203,9 @@
* or by 32KHz clk, or from external sig. This rate is divided by a local
* divisor.
*/
-#define V_PVT 7 /* use with 12MHz/128 */
-
#define CONFIG_SYS_TIMERBASE OMAP2420_GPT2
-#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */
-#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
+#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/armadillo.h b/include/configs/armadillo.h
index 5a4ceaf..7ba5e17 100644
--- a/include/configs/armadillo.h
+++ b/include/configs/armadillo.h
@@ -64,6 +64,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_CLPS7111_SERIAL
#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */
@@ -105,8 +106,6 @@
#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x00040000 /* default load address for armadillo: kernel img is here*/
#define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */
diff --git a/include/configs/assabet.h b/include/configs/assabet.h
index 024fa20..a6c442b 100644
--- a/include/configs/assabet.h
+++ b/include/configs/assabet.h
@@ -57,6 +57,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_SA1100_SERIAL
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on Intel Assabet */
/* allow to overwrite serial and ethaddr */
@@ -105,8 +106,6 @@
#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ
-
#define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */
#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h
index f19374e..751e03c 100644
--- a/include/configs/cerf250.h
+++ b/include/configs/cerf250.h
@@ -113,8 +113,6 @@
#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ
-
#define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h
index ce36a24..7ea1a46 100644
--- a/include/configs/cm4008.h
+++ b/include/configs/cm4008.h
@@ -53,6 +53,7 @@
* select serial console configuration
*/
#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_KS8695_SERIAL
#define CONFIG_SERIAL1
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
@@ -93,8 +94,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00800000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 16 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */
#define CONFIG_SYS_HZ (1000) /* 1ms resolution ticks */
diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h
index 02cb1ef..ea374da 100644
--- a/include/configs/cm41xx.h
+++ b/include/configs/cm41xx.h
@@ -53,6 +53,7 @@
* select serial console configuration
*/
#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_KS8695_SERIAL
#define CONFIG_SERIAL1
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
@@ -93,8 +94,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00800000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 16 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x00008000 /* default load address */
#define CONFIG_SYS_HZ (1000) /* 1ms resolution ticks */
diff --git a/include/configs/cradle.h b/include/configs/cradle.h
index 5131175..850d93b 100644
--- a/include/configs/cradle.h
+++ b/include/configs/cradle.h
@@ -99,8 +99,6 @@
#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/csb226.h b/include/configs/csb226.h
index d65c14a..d9f85f0 100644
--- a/include/configs/csb226.h
+++ b/include/configs/csb226.h
@@ -124,8 +124,6 @@
#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* default load address */
/* RS: where is this documented? */
/* RS: is this where U-Boot is */
diff --git a/include/configs/csb272.h b/include/configs/csb272.h
index 5d3b09a..204aea0 100644
--- a/include/configs/csb272.h
+++ b/include/configs/csb272.h
@@ -140,7 +140,6 @@
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_info (bd_t) */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
diff --git a/include/configs/csb472.h b/include/configs/csb472.h
index a33efde..9b3a11c 100644
--- a/include/configs/csb472.h
+++ b/include/configs/csb472.h
@@ -139,7 +139,6 @@
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */
#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_info (bd_t) */
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h
index 667c0d8..b43beaa 100644
--- a/include/configs/davinci_dvevm.h
+++ b/include/configs/davinci_dvevm.h
@@ -112,6 +112,7 @@
/* Flash & Environment */
/*=====================*/
#ifdef CONFIG_SYS_USE_NAND
+#define CONFIG_NAND_DAVINCI
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h
index 22d3808..2c97a00 100644
--- a/include/configs/davinci_schmoogie.h
+++ b/include/configs/davinci_schmoogie.h
@@ -81,6 +81,7 @@
/*=====================*/
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_SYS_NO_FLASH
+#define CONFIG_NAND_DAVINCI
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
#define CONFIG_ENV_SIZE SZ_128K
diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h
index 875bab6..9354c2f 100644
--- a/include/configs/davinci_sffsdr.h
+++ b/include/configs/davinci_sffsdr.h
@@ -77,6 +77,7 @@
/* Flash & Environment */
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_SYS_NO_FLASH
+#define CONFIG_NAND_DAVINCI
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
#define CONFIG_ENV_SIZE SZ_128K
diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h
index 47ab27a..0865d0d 100644
--- a/include/configs/davinci_sonata.h
+++ b/include/configs/davinci_sonata.h
@@ -112,6 +112,7 @@
/* Flash & Environment */
/*=====================*/
#ifdef CONFIG_SYS_USE_NAND
+#define CONFIG_NAND_DAVINCI
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
diff --git a/include/configs/delta.h b/include/configs/delta.h
index 001b48a..f5508b7 100644
--- a/include/configs/delta.h
+++ b/include/configs/delta.h
@@ -166,8 +166,6 @@
#define CONFIG_SYS_MEMTEST_START 0x80400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x80800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/dnp1110.h b/include/configs/dnp1110.h
index e329fd3..8f615bd 100644
--- a/include/configs/dnp1110.h
+++ b/include/configs/dnp1110.h
@@ -59,6 +59,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_SA1100_SERIAL
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 */
/* allow to overwrite serial and ethaddr */
@@ -109,8 +110,6 @@
#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xc0200000 /* default load address */
#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
diff --git a/include/configs/eNET.h b/include/configs/eNET.h
index 84e1aef..f7e6608 100644
--- a/include/configs/eNET.h
+++ b/include/configs/eNET.h
@@ -116,8 +116,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */
diff --git a/include/configs/ep7312.h b/include/configs/ep7312.h
index 322a3ca..630fff3 100644
--- a/include/configs/ep7312.h
+++ b/include/configs/ep7312.h
@@ -55,6 +55,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_CLPS7111_SERIAL
#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */
@@ -107,8 +108,6 @@
#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xc0500000 /* default load address */
#define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */
diff --git a/include/configs/evb4510.h b/include/configs/evb4510.h
index cbaae62..ffc9408 100644
--- a/include/configs/evb4510.h
+++ b/include/configs/evb4510.h
@@ -122,8 +122,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x00780000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x00000000 /* default load address */
#define CONFIG_SYS_SYS_CLK_FREQ 50000000 /* CPU freq: 50 MHz */
diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h
index c0b3ab9..77d4578 100644
--- a/include/configs/gcplus.h
+++ b/include/configs/gcplus.h
@@ -70,6 +70,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_SA1100_SERIAL
#define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */
/* allow to overwrite serial and ethaddr */
@@ -118,8 +119,6 @@
#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */
#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
diff --git a/include/configs/hymod.h b/include/configs/hymod.h
index 2dacfb6..284672b 100644
--- a/include/configs/hymod.h
+++ b/include/configs/hymod.h
@@ -271,8 +271,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x03c00000 /* 4 ... 60 MB in DRAM */
-#define CONFIG_SYS_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
diff --git a/include/configs/impa7.h b/include/configs/impa7.h
index a3d023f..c7001cc 100644
--- a/include/configs/impa7.h
+++ b/include/configs/impa7.h
@@ -54,6 +54,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_CLPS7111_SERIAL
#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */
@@ -106,8 +107,6 @@
#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xc1000000 /* default load address */
#define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */
diff --git a/include/configs/innokom.h b/include/configs/innokom.h
index 043ae2f..895998a 100644
--- a/include/configs/innokom.h
+++ b/include/configs/innokom.h
@@ -115,8 +115,6 @@
#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* load kernel to this address */
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index 6ce3b4d..9231e64 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -102,7 +102,6 @@
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
/*-----------------------------------------------------------------------
diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h
index 5b4747a..b4219d0 100644
--- a/include/configs/integratorcp.h
+++ b/include/configs/integratorcp.h
@@ -121,7 +121,6 @@ SIB at Block62 End Block62 address 0x24f80000
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
/*-----------------------------------------------------------------------
diff --git a/include/configs/ixdp425.h b/include/configs/ixdp425.h
index 70f3987..768e836 100644
--- a/include/configs/ixdp425.h
+++ b/include/configs/ixdp425.h
@@ -104,8 +104,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */
#define CONFIG_SYS_HZ 3333333 /* spec says 66.666 MHz, but it appears to be 33 */
diff --git a/include/configs/ixdpg425.h b/include/configs/ixdpg425.h
index 193008e..75707e5 100644
--- a/include/configs/ixdpg425.h
+++ b/include/configs/ixdpg425.h
@@ -115,7 +115,6 @@
#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/* valid baudrates */
diff --git a/include/configs/lart.h b/include/configs/lart.h
index 38b8e75..e34ec22 100644
--- a/include/configs/lart.h
+++ b/include/configs/lart.h
@@ -52,6 +52,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_SA1100_SERIAL
#define CONFIG_SERIAL3 1 /* we use SERIAL 3 on LART */
/* allow to overwrite serial and ethaddr */
@@ -102,8 +103,6 @@
#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xc8000000 /* default load address */
#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
diff --git a/include/configs/logodl.h b/include/configs/logodl.h
index cd105da..9afa800 100644
--- a/include/configs/logodl.h
+++ b/include/configs/logodl.h
@@ -108,8 +108,6 @@
#define CONFIG_SYS_MEMTEST_START 0x08000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0800ffff /* 64 KiB */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x08000000 /* load kernel to this address */
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/lpc2292sodimm.h b/include/configs/lpc2292sodimm.h
index 563d35b..1515038 100644
--- a/include/configs/lpc2292sodimm.h
+++ b/include/configs/lpc2292sodimm.h
@@ -59,6 +59,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_LPC2292_SERIAL
#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */
@@ -106,8 +107,6 @@
#define CONFIG_SYS_MEMTEST_START 0x40000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x40000000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x00040000 /* default load address for */
/* armadillo: kernel img is here*/
diff --git a/include/configs/lpd7a400.h b/include/configs/lpd7a400.h
index 575f2a1..b1bd74f 100644
--- a/include/configs/lpd7a400.h
+++ b/include/configs/lpd7a400.h
@@ -99,8 +99,6 @@
#define CONFIG_SYS_MEMTEST_START 0xc0300000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc0500000 /* 2 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xc0f00000 /* default load address */
/* valid baudrates */
diff --git a/include/configs/lpd7a404.h b/include/configs/lpd7a404.h
index 3e726a0..b197674 100644
--- a/include/configs/lpd7a404.h
+++ b/include/configs/lpd7a404.h
@@ -99,8 +99,6 @@
#define CONFIG_SYS_MEMTEST_START 0xc0300000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc0500000 /* 2 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xc0f00000 /* default load address */
/* valid baudrates */
diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h
index 69774d7..a4b430b 100644
--- a/include/configs/lubbock.h
+++ b/include/configs/lubbock.h
@@ -122,8 +122,6 @@
#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/modnet50.h b/include/configs/modnet50.h
index 27213a8..74bab5f 100644
--- a/include/configs/modnet50.h
+++ b/include/configs/modnet50.h
@@ -56,6 +56,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_NETARM_SERIAL
#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
/* allow to overwrite serial and ethaddr */
@@ -111,8 +112,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x00500000 /* default load address */
#define CONFIG_SYS_HZ 900 /* decrementer freq: 2 kHz */
diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h
index f136b0c..12e567b 100644
--- a/include/configs/mx1ads.h
+++ b/include/configs/mx1ads.h
@@ -40,6 +40,7 @@
/*
* Select serial console configuration
*/
+#define CONFIG_IMX_SERIAL
#define CONFIG_IMX_SERIAL1 /* internal uart 1 */
/* #define _CONFIG_UART2 */ /* internal uart 2 */
/* #define CONFIG_SILENT_CONSOLE */ /* use this to disable output */
@@ -133,7 +134,6 @@
#define CONFIG_SYS_MEMTEST_START 0x09000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0AF00000 /* 63 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CONFIG_SYS_LOAD_ADDR 0x08800000 /* default load address */
/*#define CONFIG_SYS_HZ 1000 */
#define CONFIG_SYS_HZ 3686400
diff --git a/include/configs/mx1fs2.h b/include/configs/mx1fs2.h
index a19eb78..431e669 100644
--- a/include/configs/mx1fs2.h
+++ b/include/configs/mx1fs2.h
@@ -80,8 +80,6 @@
#define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */
#define CONFIG_SYS_MEMTEST_END 0x08F00000
-#undef CONFIG_SYS_CLKS_IN_HZ /* use HZ for freq. display */
-
#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
#define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */
@@ -291,11 +289,12 @@
0x000b00b ->3<- -> 64MHz/4=16MHz */
#ifdef _CONFIG_UART1
+#define CONFIG_IMX_SERIAL
#define CONFIG_IMX_SERIAL1
#elif defined _CONFIG_UART2
+#define CONFIG_IMX_SERIAL
#define CONFIG_IMX_SERIAL2
#elif defined _CONFIG_UART3 | defined _CONFIG_UART4
-#define CONFIG_IMX_SERIAL_NONE
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK 3686400
diff --git a/include/configs/netstar.h b/include/configs/netstar.h
index 0b38549..39560de 100644
--- a/include/configs/netstar.h
+++ b/include/configs/netstar.h
@@ -59,16 +59,6 @@
#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
-/*
- * FLASH organization
- */
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define PHYS_FLASH_1_SIZE (1 * 1024 * 1024)
-#define CONFIG_SYS_MAX_FLASH_SECT 19
-#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* in ticks */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ)
-
#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
@@ -106,10 +96,28 @@
#define CONFIG_DRIVER_SMC91111
#define CONFIG_SMC91111_BASE 0x04000300
+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_SECT 19
+
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+#define CONFIG_FLASH_CFI_LEGACY
+#define CONFIG_SYS_FLASH_LEGACY_512Kx16
+
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23)
#define NAND_ALLOW_ERASE_ALL 1
+#define CONFIG_HARD_I2C
+#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C_SLAVE 1
+#define CONFIG_DRIVER_OMAP1510_I2C
+
+#define CONFIG_RTC_DS1307
+#define CONFIG_SYS_I2C_RTC_ADDR 0x68
+
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
@@ -133,6 +141,7 @@
*/
#define CONFIG_CMD_BDI
#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_FLASH
@@ -211,16 +220,14 @@
#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
(CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */
/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
* This time is further subdivided by a local divisor.
*/
#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
-#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV 7 /* 2^(pvt+1), divide by 256 */
+#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
#define OMAP5910_DPLL_DIV 1
#define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \
diff --git a/include/configs/nmdk8815.h b/include/configs/nmdk8815.h
index 543780d..6d7b94f 100644
--- a/include/configs/nmdk8815.h
+++ b/include/configs/nmdk8815.h
@@ -96,7 +96,6 @@
/* timing informazion */
#define CONFIG_SYS_HZ (2400000 / 256) /* Timer0: 2.4Mhz + divider */
#define CONFIG_SYS_TIMERBASE 0x101E2000
-#undef CONFIG_SYS_CLKS_IN_HZ
/* serial port (PL011) configuration */
#define CONFIG_PL011_SERIAL
diff --git a/include/configs/ns9750dev.h b/include/configs/ns9750dev.h
index b22c33c..79dcd64 100644
--- a/include/configs/ns9750dev.h
+++ b/include/configs/ns9750dev.h
@@ -122,8 +122,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x00780000 /* 7,5 MB in DRAM */ /* @TODO */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x00600000 /* default load address */ /* @TODO */
#define CONFIG_SYS_HZ (CPU_CLK_FREQ/64)
diff --git a/include/configs/omap1510inn.h b/include/configs/omap1510inn.h
index c7d1b6c..6c1c5ec 100644
--- a/include/configs/omap1510inn.h
+++ b/include/configs/omap1510inn.h
@@ -130,16 +130,14 @@
#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
* This time is further subdivided by a local divisor.
*/
-#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
-#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE /* use timer 1 */
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/omap1610h2.h b/include/configs/omap1610h2.h
index e2a6360..42e0198 100644
--- a/include/configs/omap1610h2.h
+++ b/include/configs/omap1610h2.h
@@ -125,16 +125,14 @@
#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
* DPLL1. This time is further subdivided by a local divisor.
*/
#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
-#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/omap1610inn.h b/include/configs/omap1610inn.h
index 5dcfce1..22c873e 100644
--- a/include/configs/omap1610inn.h
+++ b/include/configs/omap1610inn.h
@@ -130,16 +130,14 @@
#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
* DPLL1. This time is further subdivided by a local divisor.
*/
#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
-#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h
index 983b5f2..331bf45 100644
--- a/include/configs/omap2420h4.h
+++ b/include/configs/omap2420h4.h
@@ -216,22 +216,20 @@
#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) /* memtest works on */
#define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M)
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) /* default load address */
/* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
* 32KHz clk, or from external sig. This rate is divided by a local divisor.
*/
#ifdef CONFIG_APTIX
-#define V_PVT 3
+#define V_PTV 3
#else
-#define V_PVT 7 /* use with 12MHz/128 */
+#define V_PTV 7 /* use with 12MHz/128 */
#endif
-#define CONFIG_SYS_TIMERBASE OMAP2420_GPT2
-#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */
-#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_TIMERBASE OMAP2420_GPT2
+#define CONFIG_SYS_PTV V_PTV /* 2^(PTV+1) */
+#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 0f9344b..7db1eb7 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -219,8 +219,6 @@
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
0x01F00000) /* 31MB */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
/* load address */
@@ -228,11 +226,9 @@
* 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
* 32KHz clk, or from external sig. This rate is divided by a local divisor.
*/
-#define V_PVT 7
-
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
-#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */
-#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
+#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index f4498a9..2f532d5 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -212,9 +212,6 @@
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
0x01F00000) /* 31MB */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, */
- /* in Hz */
-
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
/* address */
@@ -222,11 +219,9 @@
* 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
* 32KHz clk, or from external sig. This rate is divided by a local divisor.
*/
-#define V_PVT 7
-
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
-#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */
-#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
+#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index dee0417..0c32100 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -206,9 +206,6 @@
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
0x01F00000) /* 31MB */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, */
- /* in Hz */
-
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
/* address */
@@ -216,11 +213,9 @@
* 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
* 32KHz clk, or from external sig. This rate is divided by a local divisor.
*/
-#define V_PVT 7
-
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
-#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */
-#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
+#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index 00c0374..fb4e50d 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -208,9 +208,6 @@
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
0x01F00000) /* 31MB */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, */
- /* in Hz */
-
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
/* address */
@@ -218,11 +215,9 @@
* 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
* 32KHz clk, or from external sig. This rate is divided by a local divisor.
*/
-#define V_PVT 7
-
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
-#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */
-#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
+#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index f8ae163..883234a 100644
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -216,8 +216,6 @@
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
0x01F00000) /* 31MB */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
/* load address */
@@ -225,11 +223,9 @@
* 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
* 32KHz clk, or from external sig. This rate is divided by a local divisor.
*/
-#define V_PVT 7
-
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
-#define CONFIG_SYS_PVT V_PVT /* 2^(pvt+1) */
-#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
+#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h
index 63cd9c6..d0ce9dc 100644
--- a/include/configs/omap5912osk.h
+++ b/include/configs/omap5912osk.h
@@ -134,16 +134,14 @@
#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
* DPLL1. This time is further subdivided by a local divisor.
*/
#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
-#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/omap730p2.h b/include/configs/omap730p2.h
index 166d592..32a9b23 100644
--- a/include/configs/omap730p2.h
+++ b/include/configs/omap730p2.h
@@ -142,18 +142,15 @@
#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
/* The OMAP730 has 3 general purpose MPU timers, they can be driven by
* the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a
* local divisor.
*/
-
-#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
-#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
/*-----------------------------------------------------------------------
* Stack sizes
diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h
index 4da401f..edaa81b 100644
--- a/include/configs/pdnb3.h
+++ b/include/configs/pdnb3.h
@@ -117,7 +117,6 @@
#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
#define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
diff --git a/include/configs/pleb2.h b/include/configs/pleb2.h
index 59741a9..ab9ea4f 100644
--- a/include/configs/pleb2.h
+++ b/include/configs/pleb2.h
@@ -122,8 +122,6 @@
#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h
index d1c2c65..5e2e7cf 100644
--- a/include/configs/pxa255_idp.h
+++ b/include/configs/pxa255_idp.h
@@ -236,8 +236,6 @@
#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xa0800000 /* default load address */
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h
index bf4a14e..af00187 100644
--- a/include/configs/sbc2410x.h
+++ b/include/configs/sbc2410x.h
@@ -70,6 +70,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_S3C24X0_SERIAL
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SBC2410X */
/************************************************************
@@ -135,8 +136,6 @@
#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */
/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
@@ -200,6 +199,7 @@
* NAND flash settings
*/
#if defined(CONFIG_CMD_NAND)
+#define CONFIG_NAND_S3C2410
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
diff --git a/include/configs/sc520_cdp.h b/include/configs/sc520_cdp.h
index 960350c..3e2bb02 100644
--- a/include/configs/sc520_cdp.h
+++ b/include/configs/sc520_cdp.h
@@ -116,8 +116,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */
diff --git a/include/configs/sc520_spunk.h b/include/configs/sc520_spunk.h
index 2445a34..d42ef84 100644
--- a/include/configs/sc520_spunk.h
+++ b/include/configs/sc520_spunk.h
@@ -117,8 +117,6 @@
#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */
diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h
index 5971df7..2f166c9 100644
--- a/include/configs/scb9328.h
+++ b/include/configs/scb9328.h
@@ -29,6 +29,7 @@
#define CONFIG_SCB9328 1 /* on a scb9328tronix board */
#undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */
+#define CONFIG_IMX_SERIAL
#define CONFIG_IMX_SERIAL1
/*
* Select serial console configuration
@@ -86,8 +87,6 @@
#define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */
#define CONFIG_SYS_MEMTEST_END 0x08F00000
-#undef CONFIG_SYS_CLKS_IN_HZ /* use HZ for freq. display */
-
#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
#define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */
diff --git a/include/configs/shannon.h b/include/configs/shannon.h
index 75ba34c..c8b0b16 100644
--- a/include/configs/shannon.h
+++ b/include/configs/shannon.h
@@ -59,6 +59,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_SA1100_SERIAL
#define CONFIG_SERIAL3 1 /* we use SERIAL 3 */
/* allow to overwrite serial and ethaddr */
@@ -105,8 +106,6 @@
#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xd0000000 /* default load address */
#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
diff --git a/include/configs/smdk2400.h b/include/configs/smdk2400.h
index 6388be4..ffdf217 100644
--- a/include/configs/smdk2400.h
+++ b/include/configs/smdk2400.h
@@ -63,6 +63,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_S3C24X0_SERIAL
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SAMSUNG */
#undef CONFIG_HWFLOW /* include RTS/CTS flow control support */
@@ -137,8 +138,6 @@
#define CONFIG_SYS_MEMTEST_START 0x0c000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0e000000 /* 32 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x0cf00000 /* default load address */
/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h
index ecd958b..fb43706 100644
--- a/include/configs/smdk2410.h
+++ b/include/configs/smdk2410.h
@@ -60,6 +60,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_S3C24X0_SERIAL
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
/************************************************************
@@ -120,8 +121,6 @@
#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */
/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h
index 06d6a88..d3cf6e5 100644
--- a/include/configs/smdk6400.h
+++ b/include/configs/smdk6400.h
@@ -288,6 +288,7 @@
#if !defined(CONFIG_ENABLE_MMU)
#define CONFIG_CMD_USB 1
+#define CONFIG_USB_S3C64XX
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x74300000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6400"
diff --git a/include/configs/trab.h b/include/configs/trab.h
index 8f13c35..520fe36 100644
--- a/include/configs/trab.h
+++ b/include/configs/trab.h
@@ -111,6 +111,7 @@
/*
* select serial console configuration
*/
+#define CONFIG_S3C24X0_SERIAL
#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
#define CONFIG_HWFLOW /* include RTS/CTS flow control support */
@@ -316,8 +317,6 @@
#define CONFIG_SYS_MEMTEST_START 0x0C000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0x0CF00000 /* default load address */
#ifdef CONFIG_TRAB_50MHZ
diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h
index 70e5ce9..c2744b5 100644
--- a/include/configs/trizepsiv.h
+++ b/include/configs/trizepsiv.h
@@ -163,8 +163,6 @@
#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xa1000000 /* default load address */
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/versatile.h b/include/configs/versatile.h
index 852becb..8f6383b 100644
--- a/include/configs/versatile.h
+++ b/include/configs/versatile.h
@@ -144,7 +144,6 @@
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
/*-----------------------------------------------------------------------
diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h
index cadd906..3f97843 100644
--- a/include/configs/voiceblue.h
+++ b/include/configs/voiceblue.h
@@ -210,14 +210,12 @@
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - PHYS_SDRAM_1_RESERVED
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
* This time is further subdivided by a local divisor.
*/
-#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
-#define CONFIG_SYS_PVT 7 /* 2^(pvt+1), divide by 256 */
-#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
+#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
+#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
#define OMAP5910_DPLL_DIV 1
#define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \
diff --git a/include/configs/wepep250.h b/include/configs/wepep250.h
index d0afd29..717577f 100644
--- a/include/configs/wepep250.h
+++ b/include/configs/wepep250.h
@@ -79,8 +79,6 @@
#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest test area */
#define CONFIG_SYS_MEMTEST_END 0xa0800000
-#undef CONFIG_SYS_CLKS_IN_HZ /* use HZ for freq. display */
-
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */
diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h
index 250247c..086ca69 100644
--- a/include/configs/xaeniax.h
+++ b/include/configs/xaeniax.h
@@ -134,8 +134,6 @@
#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xa1000000 /* default load address */
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/xm250.h b/include/configs/xm250.h
index 8e9d5ab..922eb2c 100644
--- a/include/configs/xm250.h
+++ b/include/configs/xm250.h
@@ -117,8 +117,6 @@
#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* default load address */
#define CONFIG_SYS_HZ 1000
diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h
index 5d13f96..cad414c 100644
--- a/include/configs/xsengine.h
+++ b/include/configs/xsengine.h
@@ -139,7 +139,6 @@
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
#define CONFIG_SYS_MEMTEST_START 0xA0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0xA0800000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* valid baudrates */
#define CONFIG_SYS_LOAD_ADDR 0xA0000000 /* load kernel to this address */
diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h
index 6febeea..064740d 100644
--- a/include/configs/zylonite.h
+++ b/include/configs/zylonite.h
@@ -139,8 +139,6 @@
#define CONFIG_SYS_MEMTEST_START 0x9c000000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x9c400000 /* 4 ... 8 MB in DRAM */
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
-
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DRAM_BASE + 0x8000) /* default load address */
#define CONFIG_SYS_HZ 1000