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authorWolfgang Denk <wd@pollux.denx.de>2007-03-08 23:06:12 +0100
committerWolfgang Denk <wd@denx.de>2007-03-08 23:06:12 +0100
commitcf3b41e0c1111dbb865b6e34e9f3c3d3145a6093 (patch)
tree1737a3fe7a054b35831605f17b3f2649595b2a57 /include/configs
parenteb92f613556800f7483666db09d9a237ad911d4a (diff)
parent992423ab43c2bcf6b704853bd00af77450915e20 (diff)
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Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/PLU405.h8
1 files changed, 2 insertions, 6 deletions
diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index dd5d831..d02c39b 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -51,17 +51,13 @@
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if 0 /* test-only */
#define CONFIG_NET_MULTI 1
+#undef CONFIG_HAS_ETH1
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
-#define CONFIG_PHY1_ADDR 1 /* PHY address */
-#else
-#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_PHY_ADDR 0 /* PHY address */
-#endif
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/