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authorStefan Roese <sr@denx.de>2008-03-28 14:09:04 +0100
committerStefan Roese <sr@denx.de>2008-03-28 14:09:04 +0100
commitcc8e839abc80887ae832767b5930d40edd6d7eb7 (patch)
treec2836a2fb20f01b3a682f3447c0fab3be54cc7b4 /include/configs
parent5e12e75d17c4b15a310a45cd78fe71b7698a8a8e (diff)
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ppc4xx: Canyonlands: Print SATA/PCIe configuration and board revision
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA interface. This usage can be configured with the jumper J6. This patch displays the current configuration upon bootup and changes the PCIe init loop, to only initialize the availabel PCIe slots. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/canyonlands.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h
index 76a2f7c..a1c6674 100644
--- a/include/configs/canyonlands.h
+++ b/include/configs/canyonlands.h
@@ -41,6 +41,7 @@
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_r */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
+#define CONFIG_BOARD_TYPES 1 /* support board types */
/*-----------------------------------------------------------------------
* Base addresses -- Note these are effective addresses where the