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authorWolfgang Denk <wd@denx.de>2007-03-16 22:20:36 +0100
committerWolfgang Denk <wd@denx.de>2007-03-16 22:20:36 +0100
commit87e0662762b78ed7731f14add60ba0edb0479252 (patch)
tree3e287b224b2bb1e2dce1b129b5d970c4c2aa5443 /include/configs
parenta7090b993d3d4d2221ac3f33e6cb1d1b2ccc6bf0 (diff)
parent8423e5e31a7235d05a482627315fb11d49c17bd7 (diff)
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Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/PCI405.h11
-rw-r--r--include/configs/ebony.h5
2 files changed, 9 insertions, 7 deletions
diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h
index 9d5c4f4..027dd22 100644
--- a/include/configs/PCI405.h
+++ b/include/configs/PCI405.h
@@ -1,6 +1,9 @@
/*
+ * (C) Copyright 2007
+ * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com
+ *
* (C) Copyright 2001-2004
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -32,8 +35,6 @@
* High Level Configuration Options
* (easy to change)
*/
-#define CONFIG_IDENT_STRING " $Name: esd_PCI405_05_07_28 $"
-
#define CONFIG_405GP 1 /* This is a PPC405 CPU */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_PCI405 1 /* ...on a PCI405 board */
@@ -53,9 +54,9 @@
"mem_linux=14336k\0" \
"optargs=panic=0\0" \
"ramargs=setenv bootargs mem=$mem_linux root=/dev/ram rw\0" \
- "addcon=setenv bootargs $bootargs console=ttyS0,$baudrate $optargs\0" \
+ "addcons=setenv bootargs $bootargs console=ttyS0,$baudrate $optargs\0" \
""
-#define CONFIG_BOOTCOMMAND "run ramargs;run addcon;loadpci"
+#define CONFIG_BOOTCOMMAND "run ramargs;run addcons;loadpci"
#define CONFIG_PREBOOT /* enable preboot variable */
diff --git a/include/configs/ebony.h b/include/configs/ebony.h
index 6c4d7cc..a42319b 100644
--- a/include/configs/ebony.h
+++ b/include/configs/ebony.h
@@ -133,8 +133,9 @@
/*-----------------------------------------------------------------------
* DDR SDRAM
*----------------------------------------------------------------------*/
-#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
-#define SPD_EEPROM_ADDRESS {0x53,0x52} /* SPD i2c spd addresses */
+#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
+#define SPD_EEPROM_ADDRESS {0x53,0x52} /* SPD i2c spd addresses */
+#define CONFIG_PROG_SDRAM_TLB 1 /* setup SDRAM TLB's dynamically*/
/*-----------------------------------------------------------------------
* I2C