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authorKumar Gala <galak@kernel.crashing.org>2006-01-12 19:51:38 -0600
committerKumar Gala <galak@kernel.crashing.org>2006-01-12 19:51:38 -0600
commit86902b8e36f86c8675be6b759c2a8ced50805f64 (patch)
tree8cf42888ddd112267bdf28ace2a92521885b23a1 /include/configs
parentc7428d49ace4f2f16174ca028fe7072c02a473c8 (diff)
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Added PCI support for MPC8349ADS board
Patch by Kumar Gala 11 Jan 2006
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/MPC8349ADS.h24
1 files changed, 15 insertions, 9 deletions
diff --git a/include/configs/MPC8349ADS.h b/include/configs/MPC8349ADS.h
index d6d2fab..5677fa1 100644
--- a/include/configs/MPC8349ADS.h
+++ b/include/configs/MPC8349ADS.h
@@ -41,9 +41,8 @@
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_MPC8349ADS 1 /* MPC8349ADS board specific */
-/* FIXME: Real PCI support will come in a follow-up update. */
-#undef CONFIG_PCI
-
+#define CONFIG_PCI
+#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
@@ -324,19 +323,26 @@
* General PCI
* Addresses are mapped 1-1.
*/
+
#define CFG_PCI1_MEM_BASE 0x80000000
#define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE
-#define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */
+#define CFG_PCI1_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCI1_MMIO_BASE 0x90000000
+#define CFG_PCI1_MMIO_PHYS CFG_PCI1_MMIO_BASE
+#define CFG_PCI1_MMIO_SIZE 0x10000000 /* 256M */
#define CFG_PCI1_IO_BASE 0x00000000
#define CFG_PCI1_IO_PHYS 0xe2000000
-#define CFG_PCI1_IO_SIZE 0x1000000 /* 16M */
+#define CFG_PCI1_IO_SIZE 0x00100000 /* 1M */
-#define CFG_PCI2_MEM_BASE 0xA0000000
+#define CFG_PCI2_MEM_BASE 0xa0000000
#define CFG_PCI2_MEM_PHYS CFG_PCI2_MEM_BASE
-#define CFG_PCI2_MEM_SIZE 0x20000000 /* 512M */
+#define CFG_PCI2_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCI2_MMIO_BASE 0xb0000000
+#define CFG_PCI2_MMIO_PHYS CFG_PCI2_MMIO_BASE
+#define CFG_PCI2_MMIO_SIZE 0x10000000 /* 256M */
#define CFG_PCI2_IO_BASE 0x00000000
-#define CFG_PCI2_IO_PHYS 0xe3000000
-#define CFG_PCI2_IO_SIZE 0x1000000 /* 16M */
+#define CFG_PCI2_IO_PHYS 0xe2100000
+#define CFG_PCI2_IO_SIZE 0x00100000 /* 1M */
#if defined(CONFIG_PCI)
#define PCI_ALL_PCI1