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authorHeiko Schocher <hs@pollux.denx.de>2007-06-22 19:11:54 +0200
committerHeiko Schocher <hs@pollux.denx.de>2007-06-22 19:11:54 +0200
commit566a494f592ae3b3c0785d90d4e1ba45574880c4 (patch)
tree933dceeaf04c7caa937774327f0b0ede81f9babc /include/configs
parent9912121f7ed804ea58fd62f3f230b5dcfc357d88 (diff)
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[PCS440EP] upgrade the PCS440EP board:
- Show on the Status LEDs, some States of the board. - Get the MAC addresses from the EEProm - use PREBOOT - use the CF on the board. - check the U-Boot image in the Flash with a SHA1 checksum. - use dynamic TLB entries generation for the SDRAM Signed-off-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/pcs440ep.h83
1 files changed, 80 insertions, 3 deletions
diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h
index 23bdfc8..d471808 100644
--- a/include/configs/pcs440ep.h
+++ b/include/configs/pcs440ep.h
@@ -105,19 +105,27 @@
#ifdef CFG_ENV_IS_IN_FLASH
#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
-#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+
+#define CONFIG_ENV_OVERWRITE 1
/* Address and size of Redundant Environment Sector */
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
#endif /* CFG_ENV_IS_IN_FLASH */
+#define ENV_NAME_REVLEV "revision_level"
+#define ENV_NAME_SOLDER "solder_switch"
+#define ENV_NAME_DIP "dip"
+
/*-----------------------------------------------------------------------
* DDR SDRAM
*----------------------------------------------------------------------*/
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
#undef CONFIG_DDR_ECC /* don't use ECC */
#define SPD_EEPROM_ADDRESS {0x50}
+#define CONFIG_PROG_SDRAM_TLB 1
+#define CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG 1
/*-----------------------------------------------------------------------
* I2C
@@ -142,6 +150,8 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"hostname=pcs440ep\0" \
+ "use_eeprom_ethaddr=default\0" \
+ "cs_test=off\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath}\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
@@ -172,6 +182,36 @@
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#endif
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+/* check U-Boot image with SHA1 sum */
+#define CONFIG_SHA1_CHECK_UB_IMG 1
+#define CONFIG_SHA1_START CFG_MONITOR_BASE
+#define CONFIG_SHA1_LEN CFG_MONITOR_LEN
+
+/*-----------------------------------------------------------------------
+ * Definitions for status LED
+ */
+#define CONFIG_STATUS_LED 1 /* Status LED enabled */
+#define CONFIG_BOARD_SPECIFIC_LED 1
+
+#define STATUS_LED_BIT 0x08 /* LED 1 is on GPIO_PPC_1 */
+#define STATUS_LED_PERIOD ((CFG_HZ / 2) / 5) /* blink at 5 Hz */
+#define STATUS_LED_STATE STATUS_LED_OFF
+#define STATUS_LED_BIT1 0x04 /* LED 2 is on GPIO_PPC_2 */
+#define STATUS_LED_PERIOD1 ((CFG_HZ / 2) / 5) /* blink at 5 Hz */
+#define STATUS_LED_STATE1 STATUS_LED_ON
+#define STATUS_LED_BIT2 0x02 /* LED 3 is on GPIO_PPC_3 */
+#define STATUS_LED_PERIOD2 ((CFG_HZ / 2) / 5) /* blink at 5 Hz */
+#define STATUS_LED_STATE2 STATUS_LED_OFF
+#define STATUS_LED_BIT3 0x01 /* LED 4 is on GPIO_PPC_4 */
+#define STATUS_LED_PERIOD3 ((CFG_HZ / 2) / 5) /* blink at 5 Hz */
+#define STATUS_LED_STATE3 STATUS_LED_OFF
+
+#define CONFIG_SHOW_BOOT_PROGRESS 1
+
#define CONFIG_BAUDRATE 115200
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
@@ -213,7 +253,10 @@
CFG_CMD_DIAG | \
CFG_CMD_EEPROM | \
CFG_CMD_ELF | \
+ CFG_CMD_EXT2 | \
+ CFG_CMD_FAT | \
CFG_CMD_I2C | \
+ CFG_CMD_IDE | \
CFG_CMD_IRQ | \
CFG_CMD_MII | \
CFG_CMD_NET | \
@@ -221,9 +264,8 @@
CFG_CMD_PCI | \
CFG_CMD_PING | \
CFG_CMD_REGINFO | \
+ CFG_CMD_REISER | \
CFG_CMD_SDRAM | \
- CFG_CMD_EXT2 | \
- CFG_CMD_FAT | \
CFG_CMD_USB )
@@ -410,4 +452,39 @@
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff Supports IDE harddisk
+ *-----------------------------------------------------------------------
+ */
+
+#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */
+
+#define CONFIG_IDE_PREINIT 1
+#define CONFIG_IDE_RESET 1
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR CFG_CF1
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET 0
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET (0x0000)
+
+/* This addresses need to be shifted one place to the left
+ * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
+ * This values are shifted
+ */
+#define CFG_ATA_PORT_ADDR(port) ((port) << 1)
+
#endif /* __CONFIG_H */