summaryrefslogtreecommitdiff
path: root/include/configs
diff options
context:
space:
mode:
authorStefano Babic <sbabic@denx.de>2010-03-29 16:43:39 +0200
committertrix <trix@windriver.com>2010-04-30 05:23:25 -0500
commit45997e0a86ee8d8abec6d791a241cb20011fe0e3 (patch)
tree63233314256dae95515eeb2fa701130d469d8720 /include/configs
parentefb9591069ee276f7fa27a821240c7511f72fe65 (diff)
downloadu-boot-imx-45997e0a86ee8d8abec6d791a241cb20011fe0e3.zip
u-boot-imx-45997e0a86ee8d8abec6d791a241cb20011fe0e3.tar.gz
u-boot-imx-45997e0a86ee8d8abec6d791a241cb20011fe0e3.tar.bz2
MX31: Add support for NAND to QONG board
The NAND device is connected to the FPGA of the QONG board and not to the NFC controller. For this reason, the FPGA must be set and initialized before accessing to the NAND itself. Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/qong.h27
1 files changed, 27 insertions, 0 deletions
diff --git a/include/configs/qong.h b/include/configs/qong.h
index e41ea91..669b586 100644
--- a/include/configs/qong.h
+++ b/include/configs/qong.h
@@ -52,6 +52,8 @@
#define CONFIG_MXC_UART 1
#define CONFIG_SYS_MX31_UART1 1
+#define CONFIG_MX31_GPIO
+
/* FPGA */
#define CONFIG_QONG_FPGA 1
#define CONFIG_FPGA_BASE (CS1_BASE)
@@ -96,6 +98,7 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_NAND
/*
* You can compile in a MAC address and your custom net settings by using
@@ -188,6 +191,30 @@
#define PHYS_SDRAM_1 CSD0_BASE
#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
+/*
+ * NAND driver
+ */
+
+#ifndef __ASSEMBLY__
+extern void qong_nand_plat_init(void *chip);
+extern int qong_nand_rdy(void *chip);
+#endif
+#define CONFIG_NAND_PLAT
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE CS3_BASE
+#define NAND_PLAT_INIT() qong_nand_plat_init(nand)
+
+#define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24))
+#define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23))
+#define QONG_NAND_WRITE(addr, cmd) \
+ do { \
+ __REG8(addr) = cmd; \
+ } while (0)
+
+#define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd)
+#define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd)
+#define NAND_PLAT_DEV_READY(chip) (qong_nand_rdy(chip))
+
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/