Merge branch 'master' of git://git.denx.de/u-boot-arm

3 files changed, 297 insertions, 18 deletions

diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 83e05b3..6d24023 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -32,8 +32,11 @@
 #define CONFIG_SYS_HZ		1000
 
 #define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
+#ifdef CONFIG_AT91SAM9G10EK
+#define CONFIG_AT91SAM9G10	1	/* It's an Atmel AT91SAM9G10 SoC*/
+#else
 #define CONFIG_AT91SAM9261	1	/* It's an Atmel AT91SAM9261 SoC*/
-#define CONFIG_AT91SAM9261EK	1	/* on an AT91SAM9261EK Board	*/
+#endif
 #define CONFIG_ARCH_CPU_INIT
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
 
@@ -62,7 +65,11 @@
 #define CONFIG_LCD_INFO_BELOW_LOGO	1
 #define CONFIG_SYS_WHITE_ON_BLACK		1
 #define CONFIG_ATMEL_LCD		1
+#ifdef CONFIG_AT91SAM9261EK
 #define CONFIG_ATMEL_LCD_BGR555		1
+#else
+#define	CONFIG_AT91SAM9G10_LCD_BASE		0x23E00000	/* LCD is no more in SRAM */
+#endif
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
 
 /* LED */
@@ -147,7 +154,11 @@
 #define CONFIG_DOS_PARTITION		1
 #define CONFIG_SYS_USB_OHCI_CPU_INIT		1
 #define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9261_UHP_BASE */
+#ifdef CONFIG_AT91SAM9G10EK
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9g10"
+#else
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9261"
+#endif
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_STORAGE		1
 #define CONFIG_CMD_FAT			1
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
new file mode 100644
index 0000000..572c45b
--- /dev/null
+++ b/include/configs/at91sam9m10g45ek.h
@@ -0,0 +1,225 @@
+/*
+ * (C) Copyright 2007-2008
+ * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Lead Tech Design <www.leadtechdesign.com>
+ *
+ * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* ARM asynchronous clock */
+#define AT91_MAIN_CLOCK		12000000	/* from 12 MHz crystal */
+#define CONFIG_SYS_HZ		1000
+
+#define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
+#ifdef CONFIG_AT91SAM9M10G45EK
+#define CONFIG_AT91SAM9M10G45	1	/* It's an Atmel AT91SAM9M10G45 SoC*/
+#else
+#define CONFIG_AT91SAM9G45	1	/* It's an Atmel AT91SAM9G45 SoC*/
+#endif
+#define CONFIG_ARCH_CPU_INIT
+#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
+
+#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_INITRD_TAG	1
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_RELOCATE_UBOOT
+
+/*
+ * Hardware drivers
+ */
+#define CONFIG_ATMEL_USART	1
+#undef CONFIG_USART0
+#undef CONFIG_USART1
+#undef CONFIG_USART2
+#define CONFIG_USART3		1	/* USART 3 is DBGU */
+
+/* LCD */
+#define CONFIG_LCD			1
+#define LCD_BPP				LCD_COLOR8
+#define CONFIG_LCD_LOGO			1
+#undef LCD_TEST_PATTERN
+#define CONFIG_LCD_INFO			1
+#define CONFIG_LCD_INFO_BELOW_LOGO	1
+#define CONFIG_SYS_WHITE_ON_BLACK		1
+#define CONFIG_ATMEL_LCD		1
+#define CONFIG_ATMEL_LCD_RGB565		1
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
+/* board specific(not enough SRAM) */
+#define CONFIG_AT91SAM9G45_LCD_BASE		0x73E00000
+
+/* LED */
+#define CONFIG_AT91_LED
+#define	CONFIG_RED_LED		AT91_PIN_PD31	/* this is the user1 led */
+#define	CONFIG_GREEN_LED	AT91_PIN_PD0	/* this is the user2 led */
+
+#define CONFIG_BOOTDELAY	3
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE	1
+#define CONFIG_BOOTP_BOOTPATH		1
+#define CONFIG_BOOTP_GATEWAY		1
+#define CONFIG_BOOTP_HOSTNAME		1
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_AUTOSCRIPT
+#undef CONFIG_CMD_LOADS
+
+#define CONFIG_CMD_PING		1
+#define CONFIG_CMD_DHCP		1
+#define CONFIG_CMD_NAND		1
+#define CONFIG_CMD_USB		1
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define PHYS_SDRAM			0x70000000
+#define PHYS_SDRAM_SIZE			0x08000000	/* 128 megs */
+
+/* DataFlash */
+#ifdef CONFIG_ATMEL_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_SPI_FLASH		1
+#define CONFIG_SPI_FLASH_ATMEL		1
+#define CONFIG_SYS_MAX_DATAFLASH_BANKS	1
+#endif
+
+/* NOR flash, if populated */
+#ifndef CONFIG_CMD_NAND
+#define CONFIG_SYS_NO_FLASH		1
+#else
+#define CONFIG_SYS_FLASH_CFI		1
+#define CONFIG_FLASH_CFI_DRIVER		1
+#define PHYS_FLASH_1			0x10000000
+#define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
+#define CONFIG_SYS_MAX_FLASH_SECT		256
+#define CONFIG_SYS_MAX_FLASH_BANKS		1
+#endif
+
+/* NAND flash */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_MAX_CHIPS			1
+#define CONFIG_NAND_ATMEL
+#define CONFIG_SYS_MAX_NAND_DEVICE		1
+#define CONFIG_SYS_NAND_BASE			0x40000000
+#define CONFIG_SYS_NAND_DBW_8			1
+/* our ALE is AD21 */
+#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
+/* our CLE is AD22 */
+#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
+#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC8
+#endif
+
+/* Ethernet */
+#define CONFIG_MACB			1
+#define CONFIG_RMII			1
+#define CONFIG_NET_MULTI		1
+#define CONFIG_NET_RETRY_COUNT		20
+#define CONFIG_RESET_PHY_R		1
+
+/* USB */
+#define CONFIG_USB_ATMEL
+#define CONFIG_USB_OHCI_NEW		1
+#define CONFIG_DOS_PARTITION		1
+#define CONFIG_SYS_USB_OHCI_CPU_INIT		1
+#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00700000	/* AT91SAM9G45_UHP_OHCI_BASE */
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9g45"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
+#define CONFIG_USB_STORAGE		1
+
+#define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
+
+#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_END			0x23e00000
+
+#ifdef CONFIG_SYS_USE_DATAFLASH
+
+/* bootstrap + u-boot + env + linux in dataflash on CS0 */
+#define CONFIG_ENV_IS_IN_SPI_FLASH	1
+#define CONFIG_SYS_MONITOR_BASE	(0xC0000000 + 0x8400)
+#define CONFIG_ENV_OFFSET		0x4200
+#define CONFIG_ENV_ADDR		(0xC0000000 + CONFIG_ENV_OFFSET)
+#define CONFIG_ENV_SIZE		0x4200
+#define CONFIG_ENV_SECT_SIZE		0x10000
+#define CONFIG_BOOTCOMMAND	"cp.b 0xC0042000 0x22000000 0x210000; bootm"
+#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
+				"root=/dev/mtdblock0 " \
+				"mtdparts=at91_nand:-(root) "\
+				"rw rootfstype=jffs2"
+
+#else /* CONFIG_SYS_USE_NANDFLASH */
+
+/* bootstrap + u-boot + env + linux in nandflash */
+#define CONFIG_ENV_IS_IN_NAND	1
+#define CONFIG_ENV_OFFSET		0x60000
+#define CONFIG_ENV_OFFSET_REDUND	0x80000
+#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
+#define CONFIG_BOOTCOMMAND	"nand read 0x72000000 0x200000 0x200000; bootm"
+#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
+				"root=/dev/mtdblock5 " \
+				"mtdparts=at91_nand:128k(bootstrap)ro, \
+				256k(uboot)ro,128k(env1)ro,128k(env2)ro, \
+				2M(linux),-(root) " \
+				"rw rootfstype=jffs2"
+
+#endif
+
+#define CONFIG_BAUDRATE		115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
+
+#define CONFIG_SYS_PROMPT		"U-Boot> "
+#define CONFIG_SYS_CBSIZE		256
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP		1
+#define CONFIG_CMDLINE_EDITING	1
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+
+#define ROUND(A, B)		(((A) + (B)) & ~((B) - 1))
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
+#define CONFIG_SYS_GBL_DATA_SIZE	128	/* 128 bytes for initial data */
+
+#define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
+
+#ifdef CONFIG_USE_IRQ
+#error CONFIG_USE_IRQ not supported
+#endif
+
+#endif
diff --git a/include/configs/versatile.h b/include/configs/versatile.h
index 300271f..a9b70cc 100644
--- a/include/configs/versatile.h
+++ b/include/configs/versatile.h
@@ -39,6 +39,10 @@
 #define CONFIG_VERSATILE	1	/* in Versatile Platform Board	*/
 #define CONFIG_ARCH_VERSATILE	1	/* Specifically, a Versatile	*/
 
+#ifndef CONFIG_ARCH_VERSATILE_AB	/* AB				*/
+#define CONFIG_ARCH_VERSATILE_PB	/* Versatile PB is default	*/
+#endif
+
 #define CONFIG_SYS_MEMTEST_START	0x100000
 #define CONFIG_SYS_MEMTEST_END		0x10000000
 #define CONFIG_SYS_HZ			(1000000 / 256)
@@ -101,7 +105,6 @@
 /*
  * Command line configuration.
  */
-
 #define CONFIG_CMD_BDI
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_FLASH
@@ -132,8 +135,13 @@
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_LONGHELP	/* undef to save memory */
-#define CONFIG_SYS_PROMPT	"Versatile # "	/* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size */
+/* Monitor Command Prompt	 */
+#ifdef CONFIG_ARCH_VERSATILE_AB
+# define CONFIG_SYS_PROMPT	"VersatileAB # "
+#else
+# define CONFIG_SYS_PROMPT	"VersatilePB # "
+#endif
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE	\
 			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
@@ -159,13 +167,20 @@
 #define CONFIG_NR_DRAM_BANKS	1	/* we have 1 bank of DRAM */
 #define PHYS_SDRAM_1		0x00000000	/* SDRAM Bank #1 */
 #define PHYS_SDRAM_1_SIZE	0x08000000	/* 128 MB */
-
-#define CONFIG_SYS_FLASH_BASE	0x34000000
+#define PHYS_FLASH_SIZE		0x04000000	/* 64MB */
 
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */
-
+/*
+ * Use the CFI flash driver for ease of use
+ */
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_ENV_IS_IN_FLASH	1
+/*
+ *	System control register
+ */
 #define VERSATILE_SYS_BASE		0x10000000
 #define VERSATILE_SYS_FLASH_OFFSET	0x4C
 #define VERSATILE_FLASHCTRL		\
@@ -173,19 +188,47 @@
 /* Enable writing to flash */
 #define VERSATILE_FLASHPROG_FLVPPEN	(1 << 0)
 
-#define CONFIG_SYS_MAX_FLASH_BANKS	1
-#define PHYS_FLASH_SIZE			0x34000000	/* 64MB */
 /* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	(20 * CONFIG_SYS_HZ) /* Erase Timeout */
-#define CONFIG_SYS_FLASH_WRITE_TOUT	(20 * CONFIG_SYS_HZ) /* Write Timeout */
-#define CONFIG_SYS_MAX_FLASH_SECT	(256)
+#define CONFIG_SYS_FLASH_ERASE_TOUT	(2 * CONFIG_SYS_HZ) /* Erase Timeout */
+#define CONFIG_SYS_FLASH_WRITE_TOUT	(2 * CONFIG_SYS_HZ) /* Write Timeout */
+
+/*
+ * Note that CONFIG_SYS_MAX_FLASH_SECT allows for a parameter block
+ * i.e.
+ *	the bottom "sector" (bottom boot), or top "sector"
+ *	(top boot), is a seperate erase region divided into
+ *	4 (equal) smaller sectors. This, notionally, allows
+ *	quicker erase/rewrire of the most frequently changed
+ *	area......
+ *	CONFIG_SYS_MAX_FLASH_SECT is padded up to a multiple of 4
+ */
+
+#ifdef CONFIG_ARCH_VERSATILE_AB
+#define FLASH_SECTOR_SIZE		0x00020000	/* 128 KB sectors */
+#define CONFIG_ENV_SECT_SIZE		(2 * FLASH_SECTOR_SIZE)
+#define CONFIG_SYS_MAX_FLASH_SECT	(520)
+#endif
+
+#ifdef CONFIG_ARCH_VERSATILE_PB		/* Versatile PB is default	*/
+#define FLASH_SECTOR_SIZE		0x00040000	/* 256 KB sectors */
+#define CONFIG_ENV_SECT_SIZE		FLASH_SECTOR_SIZE
+#define CONFIG_SYS_MAX_FLASH_SECT	(260)
+#endif
+
+#define CONFIG_SYS_FLASH_BASE		0x34000000
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+
+#define CONFIG_SYS_MONITOR_LEN		(4 * CONFIG_ENV_SECT_SIZE)
+
+/* The ARM Boot Monitor is shipped in the lowest sector of flash */
 
-#define PHYS_FLASH_1			(CONFIG_SYS_FLASH_BASE)
+#define FLASH_TOP			(CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE)
+#define CONFIG_ENV_SIZE			8192
+#define CONFIG_ENV_ADDR			(FLASH_TOP - CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
+#define CONFIG_SYS_MONITOR_BASE		(CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN)
 
-#define CONFIG_ENV_IS_IN_FLASH	1		/* env in flash */
-#define CONFIG_ENV_SECT_SIZE	0x00020000	/* 256 KB sectors (x2) */
-#define CONFIG_ENV_SIZE		0x10000		/* Size of Environment */
-#define CONFIG_ENV_OFFSET	0x01f00000	/* environment starts */
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
+#define CONFIG_SYS_FLASH_PROTECTION	/* The devices have real protection */
+#define CONFIG_SYS_FLASH_EMPTY_INFO	/* flinfo indicates empty blocks */
 
-#endif /* __CONFIG_H */
+#endif	/* __CONFIG_H */