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authorWolfgang Denk <wd@denx.de>2007-08-18 21:47:33 +0200
committerWolfgang Denk <wd@denx.de>2007-08-18 21:47:33 +0200
commit1d55483cf7fb11e4902359bc04e39489e044e695 (patch)
tree8f0eca05ff445dced74a824b94352169cc23a609 /include/configs
parent9edd580e91d7eb031298294063f5aa9fa7f0a330 (diff)
parent4cc1cd5941827a04cf5c51a07fcc42e8945894aa (diff)
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Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xx
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/MPC8313ERDB.h6
-rw-r--r--include/configs/MPC832XEMDS.h5
-rw-r--r--include/configs/MPC8349EMDS.h2
-rw-r--r--include/configs/MPC8349ITX.h2
-rw-r--r--include/configs/MPC8360EMDS.h7
5 files changed, 14 insertions, 8 deletions
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index f92dce5..96a4cd4 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -113,12 +113,12 @@
/* 0x03200064 */
#if defined(CONFIG_DDR_2T_TIMING)
#define CFG_SDRAM_CFG ( SDRAM_CFG_SREN \
- | 3 << SDRAM_CFG_SDRAM_TYPE_SHIFT \
+ | SDRAM_CFG_SDRAM_TYPE_DDR2 \
| SDRAM_CFG_2T_EN \
| SDRAM_CFG_DBW_32 )
#else
#define CFG_SDRAM_CFG ( SDRAM_CFG_SREN \
- | 3 << SDRAM_CFG_SDRAM_TYPE_SHIFT \
+ | SDRAM_CFG_SDRAM_TYPE_DDR2 \
| SDRAM_CFG_32_BE )
/* 0x43080000 */
#endif
@@ -228,7 +228,7 @@
#define CFG_LBLAWAR3_PRELIM 0x8000000E /* 32KB */
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
/* maximum size of the flat tree (8K) */
diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index f62ca2c..efc3172 100644
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -30,6 +30,8 @@
#define CONFIG_MPC83XX 1 /* MPC83xx family */
#define CONFIG_MPC832X 1 /* MPC832x CPU specific */
#define CONFIG_MPC832XEMDS 1 /* MPC832XEMDS board specific */
+#undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */
+#undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */
/*
* System Clock Setup
@@ -87,6 +89,7 @@
#define CFG_SICRL 0x00000000
#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
+#define CONFIG_BOARD_EARLY_INIT_R
/*
* IMMR new address
@@ -315,7 +318,7 @@
#endif
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
/* maximum size of the flat tree (8K) */
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 10af5f0..030c621 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -339,7 +339,7 @@
#endif
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
/* maximum size of the flat tree (8K) */
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 58ee13d..b380a1a 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -296,7 +296,7 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CFG_NS16550_COM2 (CFG_IMMR + 0x4600)
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP
/* maximum size of the flat tree (8K) */
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index 4b32a14..094b66e 100644
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -32,6 +32,8 @@
#define CONFIG_MPC83XX 1 /* MPC83XX family */
#define CONFIG_MPC8360 1 /* MPC8360 CPU specific */
#define CONFIG_MPC8360EMDS 1 /* MPC8360EMDS board specific */
+#undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */
+#undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */
/*
* System Clock Setup
@@ -88,6 +90,7 @@
#define CFG_SICRL 0x40000000
#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
+#define CONFIG_BOARD_EARLY_INIT_R
/*
* IMMR new address
@@ -309,13 +312,13 @@
/*
* CS4 on Local Bus, to PIB
*/
-#define CFG_BR4_PRELIM 0xf8008801 /* CS4 base address at 0xf8008000 */
+#define CFG_BR4_PRELIM 0xf8010801 /* CS4 base address at 0xf8010000 */
#define CFG_OR4_PRELIM 0xffffe9f7 /* size 32KB, port size 8bit, GPCM */
/*
* CS5 on Local Bus, to PIB
*/
-#define CFG_BR5_PRELIM 0xf8010801 /* CS5 base address at 0xf8010000 */
+#define CFG_BR5_PRELIM 0xf8008801 /* CS5 base address at 0xf8008000 */
#define CFG_OR5_PRELIM 0xffffe9f7 /* size 32KB, port size 8bit, GPCM */
/*