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| author | Ye.Li <B37916@freescale.com> | 2014-06-09 11:31:34 +0800 |
|---|---|---|
| committer | Ye.Li <B37916@freescale.com> | 2014-06-17 11:13:49 +0800 |
| commit | 0b67ab303873c6e3be0e8cc83175efd740c94c5c (patch) | |
| tree | 084448d0359fccb1a3f6de0b61c3accc6325d58e /include/configs | |
| parent | c7a021781b4913349d13964d628d4f6e79039714 (diff) | |
| download | u-boot-imx-0b67ab303873c6e3be0e8cc83175efd740c94c5c.zip u-boot-imx-0b67ab303873c6e3be0e8cc83175efd740c94c5c.tar.gz u-boot-imx-0b67ab303873c6e3be0e8cc83175efd740c94c5c.tar.bz2 | |
ENGR00315894-40 i.mx6dl: arm2: add the i.MX6DL arm2 board support
This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2
shared the same board with i.MX6Q ARM2 board since the i.MX6DL is
pin-pin compatible with i.MX6Q.
The patch also support the DDR 32-BIT mode option. Please define
CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT
mode.But due to the board design, it's 64bit DDR buswidth physically,
so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it.
The patch has been tested on the i.MX6Q and i.MX6DL arm2 board.
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/mx6qarm2.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index d9ee26e..b73fcbe 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -10,7 +10,6 @@ #define __CONFIG_H #define CONFIG_MX6 -#define CONFIG_MX6Q /* uncomment for PLUGIN mode support */ /* #define CONFIG_USE_PLUGIN */ @@ -158,6 +157,7 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "ARM2 U-Boot > " #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 1024 @@ -176,7 +176,11 @@ /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#ifdef CONFIG_DDR_32BIT +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) +#else #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) +#endif #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |