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| author | Jason Liu <r64343@freescale.com> | 2013-12-24 14:14:21 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2013-12-24 14:22:49 +0800 |
| commit | 8070237c1d5fc4080498a0f129bd85cc15eaef02 (patch) | |
| tree | 11dd082e270342f7ffe9c491602c3c6f50894693 /include/configs | |
| parent | 1260160c062e31536ae70137e5c52ce03328a3e1 (diff) | |
| download | u-boot-imx-8070237c1d5fc4080498a0f129bd85cc15eaef02.zip u-boot-imx-8070237c1d5fc4080498a0f129bd85cc15eaef02.tar.gz u-boot-imx-8070237c1d5fc4080498a0f129bd85cc15eaef02.tar.bz2 | |
ENGR00293195 i.mx6dl: arm2: add the i.MX6DL arm2 board support
This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2
shared the same board with i.MX6Q ARM2 board since the i.MX6DL is
pin-pin compatible with i.MX6Q.
The patch also support the DDR 32-BIT mode option. Please define
CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT
mode.But due to the board design, it's 64bit DDR buswidth physically,
so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it.
The patch has been tested on the i.MX6Q and i.MX6DL arm2 board.
Signed-off-by: Jason Liu <r64343@freescale.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/mx6qarm2.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index c318057..a29a886 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -23,7 +23,6 @@ #define __CONFIG_H #define CONFIG_MX6 -#define CONFIG_MX6Q #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x00A02000 @@ -139,7 +138,7 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT "MX6QARM2 U-Boot > " +#define CONFIG_SYS_PROMPT "ARM2 U-Boot > " #define CONFIG_AUTO_COMPLETE #define CONFIG_SYS_CBSIZE 1024 @@ -159,7 +158,11 @@ /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#ifdef CONFIG_DDR_32BIT +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) +#else #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) +#endif #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |