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| author | Joe Hershberger <joe.hershberger@ni.com> | 2011-10-11 23:57:31 -0500 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2011-11-03 18:27:56 -0500 |
| commit | 2e651b248348e156d193e46f7a5b827d74af90d6 (patch) | |
| tree | 76515fcf8008dbaefcdfdb6afffdb79376a82057 /include/configs | |
| parent | 7d6a098219f8473ca4653cce5f7a49672b967f36 (diff) | |
| download | u-boot-imx-2e651b248348e156d193e46f7a5b827d74af90d6.zip u-boot-imx-2e651b248348e156d193e46f7a5b827d74af90d6.tar.gz u-boot-imx-2e651b248348e156d193e46f7a5b827d74af90d6.tar.bz2 | |
mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code
Rename CONFIG_SYS_DDR_CONFIG to include which CS it is configuring
Cleanup the setting of the csnbds to respect the setting of
CONFIG_SYS_DDR_SDRAM_BASE
Use __ilog2 instead of writing the code to compute it
Disable unused CS configs
Ensure ddrlaw.bar is configured
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/MPC8313ERDB.h | 2 | ||||
| -rw-r--r-- | include/configs/MPC8349EMDS.h | 2 | ||||
| -rw-r--r-- | include/configs/MPC8349ITX.h | 2 | ||||
| -rw-r--r-- | include/configs/MPC8360EMDS.h | 7 | ||||
| -rw-r--r-- | include/configs/sbc8349.h | 2 | ||||
| -rw-r--r-- | include/configs/ve8313.h | 2 |
6 files changed, 9 insertions, 8 deletions
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 21771fd..31503af 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -130,7 +130,7 @@ * seem to have the SPD connected to I2C. */ #define CONFIG_SYS_DDR_SIZE 128 /* MB */ -#define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN \ +#define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ | CSCONFIG_ODT_RD_NEVER \ | CSCONFIG_ODT_WR_ONLY_CURRENT \ | CSCONFIG_ROW_BIT_13 \ diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index a6aebb7..c76455a 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -142,7 +142,7 @@ #define CONFIG_SYS_DDR_SDRAM_CFG 0x43000000 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 #else -#define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN \ +#define CONFIG_SYS_DDR_CS2_CONFIG (CSCONFIG_EN \ | CSCONFIG_ROW_BIT_13 \ | CSCONFIG_COL_BIT_10) #define CONFIG_SYS_DDR_TIMING_1 0x36332321 diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index a2ceba7..04f2da9 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -206,7 +206,7 @@ /* No SPD? Then manually set up DDR parameters */ #ifndef CONFIG_SPD_EEPROM #define CONFIG_SYS_DDR_SIZE 256 /* Mb */ - #define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN \ + #define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ | CSCONFIG_ROW_BIT_13 \ | CSCONFIG_COL_BIT_10) diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index aaff93f..e81f3d4 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -145,9 +145,10 @@ #define CONFIG_SYS_DDR_SDRAM_CFG 0x43000000 #define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 #else -#define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN \ - | CSCONFIG_ROW_BIT_13 \ - | CSCONFIG_COL_BIT_9) +#define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ + | CSCONFIG_ROW_BIT_13 \ + | CSCONFIG_COL_BIT_9) +#define CONFIG_SYS_DDR_CS1_CONFIG CONFIG_SYS_DDR_CS0_CONFIG #define CONFIG_SYS_DDR_TIMING_1 0x37344321 /* tCL-tRCD-tRP-tRAS=2.5-3-3-7 */ #define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* may need tuning */ #define CONFIG_SYS_DDR_CONTROL 0x42008000 /* Self refresh,2T timing */ diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 4812f68..e50d829 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -114,7 +114,7 @@ * NB: manual DDR setup untested on sbc834x */ #define CONFIG_SYS_DDR_SIZE 256 /* MB */ -#define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN \ +#define CONFIG_SYS_DDR_CS2_CONFIG (CSCONFIG_EN \ | CSCONFIG_ROW_BIT_13 \ | CSCONFIG_COL_BIT_10) #define CONFIG_SYS_DDR_TIMING_1 0x36332321 diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 1d45889..bf50d09 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -79,7 +79,7 @@ * have the SPD connected to I2C. */ #define CONFIG_SYS_DDR_SIZE 128 /* MB */ -#define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN \ +#define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ | CSCONFIG_AP \ | CSCONFIG_ODT_RD_NEVER \ | CSCONFIG_ODT_WR_ALL \ |