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authorAnish Trivedi <anish@freescale.com>2011-07-06 16:57:01 -0500
committerAnish Trivedi <anish@freescale.com>2011-07-06 17:14:46 -0500
commit7f9c464c6e1652c2b3968f7f00d0b1983ca6c0db (patch)
tree08ec840fe8928f768d9ff1bfaef96b4b39411102 /include/configs
parent82102d3fdeae0dcd79d9b3ab7daa96bebd5ad290 (diff)
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ENGR00152755 MX6 Switch DRAM init script from plugin to DCD for emmc fastboot
ROM requires DCD table instead of plugin to initialize DRAM if emmc fastboot mode is to be used. Therefore, switched the DRAM script from plugin to DCD table. The DCD table created is based on the following RVD script: Arik_init_DDR3_528MHz_002.inc found at http://compass.freescale.net/livelink/livelink?func=ll&objId=222928845 When fastboot mode is used by ROM, the MMC_BOOT register of USDHC does not get reset when RSTA bit is set by uboot driver. Therefore, need to write 0 to it manually during driver init. This brings USDHC out of fastboot mode, allowing normal communication with emmc to proceed in uboot. Changed comments for DLL delay to be more accurate. Signed-off-by: Anish Trivedi <anish@freescale.com>
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