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| author | Markus Klotzbuecher <mk@denx.de> | 2007-01-09 16:02:48 +0100 |
|---|---|---|
| committer | Markus Klotzbuecher <mk@pollux.denx.de> | 2007-01-09 16:02:48 +0100 |
| commit | 67fea022fa957f59653b5238c7496f80a6b70432 (patch) | |
| tree | 377f8a0f90e86ba745331db84d80cafc7dbc40dc /include/configs | |
| parent | 8fc2102faa23593c80381437c09f7745a14deb40 (diff) | |
| download | u-boot-imx-67fea022fa957f59653b5238c7496f80a6b70432.zip u-boot-imx-67fea022fa957f59653b5238c7496f80a6b70432.tar.gz u-boot-imx-67fea022fa957f59653b5238c7496f80a6b70432.tar.bz2 | |
SPC1920: cleanup memory contoller setup
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/spc1920.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/include/configs/spc1920.h b/include/configs/spc1920.h index fb70624..09bbebd 100644 --- a/include/configs/spc1920.h +++ b/include/configs/spc1920.h @@ -361,14 +361,14 @@ * DSP Host Port Interface CS3 */ #define CFG_SPC1920_HPI_BASE 0x90000000 -#define CFG_PRELIM_OR3_AM 0xF0000000 +#define CFG_PRELIM_OR3_AM 0xF8000000 -#define CFG_OR3_PRELIM (CFG_PRELIM_OR3_AM | \ +#define CFG_OR3 (CFG_PRELIM_OR3_AM | \ OR_G5LS | \ OR_SCY_0_CLK | \ OR_BI) -#define CFG_BR3_PRELIM ((CFG_SPC1920_HPI_BASE & BR_BA_MSK) | \ +#define CFG_BR3 ((CFG_SPC1920_HPI_BASE & BR_BA_MSK) | \ BR_MS_UPMA | \ BR_PS_16 | \ BR_V); @@ -396,13 +396,13 @@ */ #define CFG_SPC1920_FRAM_BASE 0x80100000 #define CFG_PRELIM_OR4_AM 0xffff8000 -#define CFG_OR4_PRELIM (CFG_PRELIM_OR4_AM | \ +#define CFG_OR4 (CFG_PRELIM_OR4_AM | \ OR_ACS_DIV2 | \ OR_BI | \ OR_SCY_4_CLK | \ OR_TRLX) -#define CFG_BR4_PRELIM ((CFG_SPC1920_FRAM_BASE & BR_BA_MSK) | BR_PS_8 | BR_V); +#define CFG_BR4 ((CFG_SPC1920_FRAM_BASE & BR_BA_MSK) | BR_PS_8 | BR_V); /* * PLD CS5 |