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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-04-16 21:30:44 +0200 |
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committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-04-16 21:30:44 +0200 |
commit | dc39ae9513c32dfeb9e018dc0d22c6484514fefb (patch) | |
tree | 136c61b2c9731ddf51ef3e222bbf1e44781c5175 /include/configs | |
parent | f75a729b5c1434d5a5bbf453b1b699bf1c3ffbce (diff) | |
download | u-boot-imx-dc39ae9513c32dfeb9e018dc0d22c6484514fefb.zip u-boot-imx-dc39ae9513c32dfeb9e018dc0d22c6484514fefb.tar.gz u-boot-imx-dc39ae9513c32dfeb9e018dc0d22c6484514fefb.tar.bz2 |
at91sam9/at91cap: improve clock framework
calculate dynamically the clock rate and pllb setting for usb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/afeb9260.h | 5 | ||||
-rw-r--r-- | include/configs/at91cap9adk.h | 6 | ||||
-rw-r--r-- | include/configs/at91sam9260ek.h | 8 | ||||
-rw-r--r-- | include/configs/at91sam9261ek.h | 5 | ||||
-rw-r--r-- | include/configs/at91sam9263ek.h | 6 | ||||
-rw-r--r-- | include/configs/at91sam9rlek.h | 5 |
6 files changed, 6 insertions, 29 deletions
diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index de938f7..d637a94 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -28,14 +28,11 @@ /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ -#define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */ -#define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ -#define AT91_SLOW_CLOCK 32768 /* slow clock */ - #define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/ #define CONFIG_AFEB9260 1 /* on an AFEB9260 Board */ +#define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index b978731..c61af08 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -30,16 +30,12 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91CAP9" #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ -#define AT91_MASTER_CLOCK 100000000 /* peripheral */ -#define AT91_CPU_CLOCK 200000000 /* cpu */ -#define CONFIG_SYS_AT91_PLLB 0x10073e01 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ -#define AT91_SLOW_CLOCK 32768 /* slow clock */ - #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ #define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */ #define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */ +#define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index bcc65bd..b6e2edf 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -29,25 +29,19 @@ /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ -#define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ -#define AT91_SLOW_CLOCK 32768 /* slow clock */ - #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ #ifdef CONFIG_AT91SAM9G20EK #define AT91_CPU_NAME "AT91SAM9G20" -#define AT91_MASTER_CLOCK 132000000 /* peripheral */ -#define AT91_CPU_CLOCK 396000000 /* cpu */ #define CONFIG_AT91SAM9G20 1 /* It's an Atmel AT91SAM9G20 SoC*/ #else #define AT91_CPU_NAME "AT91SAM9260" -#define AT91_MASTER_CLOCK 100000000 /* peripheral */ -#define AT91_CPU_CLOCK 200000000 /* cpu */ #define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/ #endif +#define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index cc40d7b..7ec171c 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -30,15 +30,12 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91SAM9261" #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ -#define AT91_MASTER_CLOCK 100000000 /* peripheral */ -#define AT91_CPU_CLOCK 200000000 /* cpu */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ -#define AT91_SLOW_CLOCK 32768 /* slow clock */ - #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ #define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/ #define CONFIG_AT91SAM9261EK 1 /* on an AT91SAM9261EK Board */ +#define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index ee1531f..34c7521 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -30,16 +30,12 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91SAM9263" #define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ -#define AT91_MASTER_CLOCK 100000000 /* peripheral */ -#define AT91_CPU_CLOCK 200000000 /* cpu */ -#define CONFIG_SYS_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ -#define AT91_SLOW_CLOCK 32768 /* slow clock */ - #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ #define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/ #define CONFIG_AT91SAM9263EK 1 /* on an AT91SAM9263EK Board */ +#define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index fec48b6..2ccf958 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -30,15 +30,12 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91SAM9RL" #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ -#define AT91_MASTER_CLOCK 100000000 /* peripheral */ -#define AT91_CPU_CLOCK 200000000 /* cpu */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ -#define AT91_SLOW_CLOCK 32768 /* slow clock */ - #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ #define CONFIG_AT91SAM9RL 1 /* It's an Atmel AT91SAM9RL SoC*/ #define CONFIG_AT91SAM9RLEK 1 /* on an AT91SAM9RLEK Board */ +#define CONFIG_ARCH_CPU_INIT #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |