diff options
| author | Paul Gortmaker <paul.gortmaker@windriver.com> | 2009-08-21 16:21:58 -0500 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2009-08-21 17:09:21 -0500 |
| commit | c0d660fbbede322648ec79d3e39389e48f5fab24 (patch) | |
| tree | e41040f048252a48c91a4645f7d88dc52910678b /include/configs | |
| parent | 1aada9cd643567d351667138851e9231ccfa245a (diff) | |
| download | u-boot-imx-c0d660fbbede322648ec79d3e39389e48f5fab24.zip u-boot-imx-c0d660fbbede322648ec79d3e39389e48f5fab24.tar.gz u-boot-imx-c0d660fbbede322648ec79d3e39389e48f5fab24.tar.bz2 | |
mpc83xx: sbc8349 - make enabling PCI more user friendly
Prior to this commit, to enable PCI, you had to go manually
edit the board config header, which isn't really user friendly.
This adds the typical PCI make targets to the toplevel Makefile
in accordance with what is being done with other boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/sbc8349.h | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 868bd54..088b283 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -40,24 +40,28 @@ #define CONFIG_MPC8349 1 /* MPC8349 specific */ #define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */ -#undef CONFIG_PCI /* Don't enable PCI2 on sbc834x - it doesn't exist physically. */ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ -#define PCI_66M -#ifdef PCI_66M -#define CONFIG_83XX_CLKIN 66000000 /* in Hz */ -#else +/* + * The default if PCI isn't enabled, or if no PCI clk setting is given + * is 66MHz; this is what the board defaults to when the PCI slot is + * physically empty. The board will automatically (i.e w/o jumpers) + * clock down to 33MHz if you insert a 33MHz PCI card. + */ +#ifdef PCI_33M #define CONFIG_83XX_CLKIN 33000000 /* in Hz */ +#else /* 66M */ +#define CONFIG_83XX_CLKIN 66000000 /* in Hz */ #endif #ifndef CONFIG_SYS_CLK_FREQ -#ifdef PCI_66M -#define CONFIG_SYS_CLK_FREQ 66000000 -#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1 -#else +#ifdef PCI_33M #define CONFIG_SYS_CLK_FREQ 33000000 #define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1 +#else /* 66M */ +#define CONFIG_SYS_CLK_FREQ 66000000 +#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1 #endif #endif |