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author | wdenk <wdenk> | 2004-03-14 16:51:43 +0000 |
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committer | wdenk <wdenk> | 2004-03-14 16:51:43 +0000 |
commit | 4b248f3f71dc867b0b636b137b044cc762b68486 (patch) | |
tree | 70b5fc533011958b15296a393fef2ed2c13836d4 /include/configs | |
parent | aaf224ab4ec400abefa17982cbd2ae995adc9978 (diff) | |
download | u-boot-imx-4b248f3f71dc867b0b636b137b044cc762b68486.zip u-boot-imx-4b248f3f71dc867b0b636b137b044cc762b68486.tar.gz u-boot-imx-4b248f3f71dc867b0b636b137b044cc762b68486.tar.bz2 |
* Patch by Pierre Aubert, 11 Mar 2004:
- add bitmap command and splash screen support in cfb console
- add [optional] origin in the bitmap display command
* Patch by Travis Sawyer, 11 Mar 2004:
Fix ocotea board early init interrupt setup.
* Patch by Thomas Viehweger, 11 Mar 2004:
Remove redundand code; add PCI-specific bits to include/mpc8260.h
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/IceCube.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h index 39a91424..37c76c3 100644 --- a/include/configs/IceCube.h +++ b/include/configs/IceCube.h @@ -174,16 +174,16 @@ /* * Flash configuration */ -#define CFG_FLASH_BASE 0xff000000 +#define CFG_FLASH_BASE 0xFF000000 #define CFG_FLASH_SIZE 0x01000000 #if !defined(CFG_LOWBOOT) -#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x740000 + 0x800000) +#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00740000 + 0x00800000) #else /* CFG_LOWBOOT */ #if defined(CFG_LOWBOOT08) -#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x30000 + 0x800000) +#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000 + 0x00800000) #endif #if defined(CFG_LOWBOOT16) -#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x30000) +#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000) #endif #endif /* CFG_LOWBOOT */ #define CFG_MAX_FLASH_BANKS 2 /* max num of memory banks */ @@ -207,7 +207,7 @@ /* * Memory map */ -#define CFG_MBAR 0xf0000000 +#define CFG_MBAR 0xF0000000 #define CFG_SDRAM_BASE 0x00000000 #define CFG_DEFAULT_MBAR 0x80000000 @@ -279,10 +279,10 @@ #ifdef CONFIG_MPC5200_DDR -#define CFG_BOOTCS_START 0xff800000 +#define CFG_BOOTCS_START 0xFF800000 #define CFG_BOOTCS_SIZE 0x00800000 #define CFG_BOOTCS_CFG 0x00047801 -#define CFG_CS1_START 0xff000000 +#define CFG_CS1_START 0xFF000000 #define CFG_CS1_SIZE 0x00800000 #define CFG_CS1_CFG 0x00047800 @@ -335,7 +335,7 @@ #define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET) /* Offset for alternate registers */ -#define CFG_ATA_ALT_OFFSET (0x005c) +#define CFG_ATA_ALT_OFFSET (0x005C) /* Interval between registers */ #define CFG_ATA_STRIDE 4 |