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authorTom Rini <trini@ti.com>2014-12-16 09:41:00 -0500
committerTom Rini <trini@ti.com>2014-12-16 09:41:00 -0500
commit3bfbf32b6fe5e2d4605bc7ee99d1844b572662c2 (patch)
tree6d13141b70a8961bc6ff67cec8a9c6e167d96bfb /include/configs
parentb9206e61f3d87535ac4f4b0b858e674fd1edfeaf (diff)
parent065496d1b5304a6a67b366b613c3504aab2e2dbd (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/socfpga_common.h33
1 files changed, 32 insertions, 1 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index c4ac94d..6bb9473 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -159,7 +159,7 @@
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 /* FIXME -- SPL only? */
#endif
- /*
+/*
* I2C support
*/
#define CONFIG_SYS_I2C
@@ -187,6 +187,37 @@ unsigned int cm_get_l4_sp_clk_hz(void);
#define CONFIG_CMD_I2C
/*
+ * QSPI support
+ */
+#ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */
+#define CONFIG_CMD_DM
+#define CONFIG_DM
+#define CONFIG_DM_SPI
+#define CONFIG_DM_SPI_FLASH
+#define CONFIG_CADENCE_QSPI
+/* Enable multiple SPI NOR flash manufacturers */
+#define CONFIG_SPI_FLASH /* SPI flash subsystem */
+#define CONFIG_SPI_FLASH_STMICRO /* Micron/Numonyx flash */
+#define CONFIG_SPI_FLASH_SPANSION /* Spansion flash */
+#define CONFIG_SPI_FLASH_MTD
+/* QSPI reference clock */
+#ifndef __ASSEMBLY__
+unsigned int cm_get_qspi_controller_clk_hz(void);
+#define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz()
+#endif
+#define CONFIG_CQSPI_DECODER 0
+#define CONFIG_CMD_SF
+#endif
+
+#ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */
+#define CONFIG_CMD_DM
+#define CONFIG_DM
+#define CONFIG_DM_SPI
+#define CONFIG_DESIGNWARE_SPI
+#define CONFIG_CMD_SPI
+#endif
+
+/*
* Serial Driver
*/
#define CONFIG_SYS_NS16550