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authorStefan Roese <sr@denx.de>2009-06-09 16:57:47 +0200
committerWolfgang Denk <wd@denx.de>2009-06-12 20:47:19 +0200
commit229549a56d9ae413c00f64fd7c728c6879a1b54b (patch)
treeb54d564c106d61aaf6fba762bb5c479e8e929893 /include/configs
parent35f2edbb6cad043ccd5ea6e78fe9b7aa21d8395f (diff)
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mpc512x: MPC5121ADS: Add NAND support
This patch adds NAND support to the MPC5121ADS board. Please note that the image size increased since NAND support didn't fit in the current image size (256k). Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/mpc5121ads.h22
1 files changed, 21 insertions, 1 deletions
diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h
index dff7f1a..45a004e 100644
--- a/include/configs/mpc5121ads.h
+++ b/include/configs/mpc5121ads.h
@@ -200,6 +200,26 @@
#undef CONFIG_SYS_FLASH_CHECKSUM
/*
+ * NAND FLASH
+ * drivers/mtd/nand/mpc5121_mpc.c (rev 2 silicon only)
+ */
+#define CONFIG_CMD_NAND
+#define CONFIG_NAND_MPC5121_NFC
+#define CONFIG_SYS_NAND_BASE 0x40000000
+
+#define CONFIG_SYS_MAX_NAND_DEVICE 2
+#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
+#define CONFIG_SYS_NAND_SELECT_DEVICE /* driver supports mutipl. chips */
+
+/*
+ * Configuration parameters for MPC5121 NAND driver
+ */
+#define CONFIG_FSL_NFC_WIDTH 1
+#define CONFIG_FSL_NFC_WRITE_SIZE 2048
+#define CONFIG_FSL_NFC_SPARE_SIZE 64
+#define CONFIG_FSL_NFC_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
+
+/*
* CPLD registers area is really only 32 bytes in size, but the smallest possible LP
* window is 64KB
*/
@@ -222,7 +242,7 @@
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */
-#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
+#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */
#ifdef CONFIG_FSL_DIU_FB
#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */
#else