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| author | Kumar Gala <galak@kernel.crashing.org> | 2006-01-12 15:52:02 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2006-01-12 15:52:02 -0600 |
| commit | 06508f1c9b35ed16f42b3dfe99f9b1182b4ec82e (patch) | |
| tree | af21232904f8c160cf9303bdf05244db1be0b4fc /include/configs | |
| parent | d5e78b7bf4f54e3ec6b3720716331643fdc13bf8 (diff) | |
| parent | bc680b12d0021a1d6f9a7fc1163902007ec971e0 (diff) | |
| download | u-boot-imx-06508f1c9b35ed16f42b3dfe99f9b1182b4ec82e.zip u-boot-imx-06508f1c9b35ed16f42b3dfe99f9b1182b4ec82e.tar.gz u-boot-imx-06508f1c9b35ed16f42b3dfe99f9b1182b4ec82e.tar.bz2 | |
Merge branch 'mpc8349ads'
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/MPC8349ADS.h | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/include/configs/MPC8349ADS.h b/include/configs/MPC8349ADS.h index 7197e0f..ab7c890 100644 --- a/include/configs/MPC8349ADS.h +++ b/include/configs/MPC8349ADS.h @@ -42,6 +42,7 @@ #define CONFIG_MPC8349ADS 1 /* MPC8349ADS board specific */ #define CONFIG_PCI +#undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -322,16 +323,23 @@ * General PCI * Addresses are mapped 1-1. */ + #define CFG_PCI1_MEM_BASE 0x80000000 #define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE -#define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */ +#define CFG_PCI1_MEM_SIZE 0x10000000 /* 256M */ +#define CFG_PCI1_MMIO_BASE 0x90000000 +#define CFG_PCI1_MMIO_PHYS CFG_PCI1_MMIO_BASE +#define CFG_PCI1_MMIO_SIZE 0x10000000 /* 256M */ #define CFG_PCI1_IO_BASE 0x00000000 #define CFG_PCI1_IO_PHYS 0xe2000000 #define CFG_PCI1_IO_SIZE 0x1000000 /* 16M */ -#define CFG_PCI2_MEM_BASE 0xA0000000 +#define CFG_PCI2_MEM_BASE 0xa0000000 #define CFG_PCI2_MEM_PHYS CFG_PCI2_MEM_BASE -#define CFG_PCI2_MEM_SIZE 0x20000000 /* 512M */ +#define CFG_PCI2_MEM_SIZE 0x10000000 /* 256M */ +#define CFG_PCI2_MMIO_BASE 0xb0000000 +#define CFG_PCI2_MMIO_PHYS CFG_PCI2_MMIO_BASE +#define CFG_PCI2_MMIO_SIZE 0x10000000 /* 256M */ #define CFG_PCI2_IO_BASE 0x00000000 #define CFG_PCI2_IO_PHYS 0xe3000000 #define CFG_PCI2_IO_SIZE 0x1000000 /* 16M */ |