board/seco: Add mx6q-uq7 basic board support

Add basic SECO MX6Q/uQ7 board support (Ethernet, UART, SD are supported).
It also adds a Kconfig skeleton to later add more SECO board (supporting
SoC and board variants).

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>

1 files changed, 166 insertions, 0 deletions

diff --git a/include/configs/secomx6quq7.h b/include/configs/secomx6quq7.h
new file mode 100644
index 0000000..46ffb7a
--- /dev/null
+++ b/include/configs/secomx6quq7.h
@@ -0,0 +1,166 @@
+/*
+ * Copyright (C) 2013 Seco S.r.l
+ *
+ * Configuration settings for the Seco Boards.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include "mx6_common.h"
+#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
+#include <linux/sizes.h>
+
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_BOARD_REVISION_TAG
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_MXC_GPIO
+
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE		UART2_BASE
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX		1
+#define CONFIG_BAUDRATE			115200
+
+/* Command definition */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_CMD_BMODE
+#define CONFIG_CMD_SETEXPR
+
+#define CONFIG_BOOTDELAY		3
+
+#define CONFIG_SYS_MEMTEST_START	0x10000000
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
+#define CONFIG_LOADADDR			0x12000000
+#define CONFIG_SYS_TEXT_BASE		0x17800000
+
+/* MMC Configuration */
+#define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_USDHC_NUM        2
+#define CONFIG_SYS_FSL_ESDHC_ADDR	0
+
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+/* Ethernet Configuration */
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_FEC_MXC
+#define CONFIG_MII
+#define IMX_FEC_BASE			ENET_BASE_ADDR
+#define CONFIG_FEC_XCV_TYPE		RGMII
+#define CONFIG_ETHPRIME			"FEC"
+#define CONFIG_FEC_MXC_PHYADDR		6
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_MICREL
+
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	"netdev=eth0\0"							\
+	"ethprime=FEC0\0"						\
+	"netdev=eth0\0"							\
+	"ethprime=FEC0\0"						\
+	"uboot=u-boot.bin\0"						\
+	"kernel=uImage\0"						\
+	"nfsroot=/opt/eldk/arm\0"					\
+	"ip_local=10.0.0.5::10.0.0.1:255.255.255.0::eth0:off\0"		\
+	"ip_server=10.0.0.1\0"						\
+	"nfs_path=/targetfs \0"						\
+	"memory=mem=1024M\0"						\
+	"bootdev=mmc dev 0; ext2load mmc 0:1\0"				\
+	"root=root=/dev/mmcblk0p1\0"					\
+	"option=rootwait rw fixrtc rootflags=barrier=1\0"		\
+	"cpu_freq=arm_freq=996\0"					\
+	"setbootargs=setenv bootargs console=ttymxc1,115200 ${root}"	\
+		" ${option} ${memory} ${cpu_freq}\0"			\
+	"setbootargs_nfs=setenv bootargs console=ttymxc1,115200"	\
+		" root=/dev/nfs  nfsroot=${ip_server}:${nfs_path}"	\
+		" nolock,wsize=4096,rsize=4096  ip=:::::eth0:dhcp"	\
+		" ${memory} ${cpu_freq}\0"				\
+	"setbootdev=setenv boot_dev ${bootdev} 10800000 /boot/uImage\0"	\
+	"bootcmd=run setbootargs; run setbootdev; run boot_dev;"	\
+		" bootm 0x10800000\0"					\
+	"stdin=serial\0"						\
+	"stdout=serial\0"						\
+	"stderr=serial\0"
+
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT		"SECO MX6Q uQ7 U-Boot > "
+
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_CBSIZE		256
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE +		\
+					 sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
+#define CONFIG_SYS_HZ			1000
+
+#define CONFIG_CMDLINE_EDITING
+
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS		1
+#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
+#define PHYS_SDRAM_SIZE			(2u * 1024 * 1024 * 1024)
+
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET	\
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR		\
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#if defined(CONFIG_ENV_IS_IN_MMC)
+	#define CONFIG_ENV_OFFSET		(6 * 128 * 1024)
+	#define CONFIG_SYS_MMC_ENV_DEV		0
+	#define CONFIG_DYNAMIC_MMC_DEVNO
+#endif
+
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMD_BOOTZ
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+#define CONFIG_CMD_CACHE
+#endif
+
+#endif /* __CONFIG_H */