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authorJagannadha Sutradharudu Teki <jagannadha.sutradharudu-teki@xilinx.com>2014-01-09 01:48:13 +0530
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-01-10 15:18:33 +0100
commit796d49969e2674f1f2ab8564ccc7b6cb62892e38 (patch)
treef3b8f9fd891f2a9bf2356ef44c58561fb3f04b9a /include/configs/zynq_zed.h
parent022b02064a04d5edf2dc8e7cdf666421eed9d888 (diff)
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zynq: Add zynq zed board support
Zed is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z020-CLG484-1 Memory: - 512 MB DDR3 - 256 Mb Quad-SPI Flash( - Full size SD/MMC card cage Connectivity: - 10/100/1000 Ethernet - USB OTG (Device/Host/OTG) - USB-UART Expansion: - FMC (Low Pin Count) - Pmod. headers (2x6) Video/Display: - HDMI output (1080p60 + audio) - VGA connector - 128 x 32 OLED - User LEDs (9) User inputs: - Slide switches (8) - Push button switches (7) Audio: - 24-bit stereo audio CODEC - Stereo line in/out - Headphone - Microphone input Analog: - Xilinx XADC header - Supports 4 analog inputs - 2 Differential / 4 Single-ended Debug: - On-board USB JTAG programming port - ARM Debug Access Port (DAP) For more info - http://zedboard.org/product/zedboard Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Diffstat (limited to 'include/configs/zynq_zed.h')
-rw-r--r--include/configs/zynq_zed.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h
new file mode 100644
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--- /dev/null
+++ b/include/configs/zynq_zed.h
@@ -0,0 +1,24 @@
+/*
+ * (C) Copyright 2013 Xilinx, Inc.
+ *
+ * Configuration for Zynq Evaluation and Development Board - ZedBoard
+ * See zynq_common.h for Zynq common configs
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_ZYNQ_ZED_H
+#define __CONFIG_ZYNQ_ZED_H
+
+#define CONFIG_ZYNQ_SERIAL_UART1
+#define CONFIG_ZYNQ_GEM0
+#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0
+
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_ZYNQ_SDHCI0
+#define CONFIG_ZYNQ_BOOT_FREEBSD
+
+#include <configs/zynq-common.h>
+
+#endif /* __CONFIG_ZYNQ_ZED_H */