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authorWolfgang Denk <wd@denx.de>2010-09-28 23:30:47 +0200
committerWolfgang Denk <wd@denx.de>2010-09-28 23:30:47 +0200
commit2e6e1772c0e34871769be4aef79748fe3e47d953 (patch)
tree00e4e19d7bccd2a1cd5753854ff4c2b8a26bebb0 /include/configs/zeus.h
parent1e4e5ef0469050f014aee1204dae8a9ab6053e49 (diff)
parent3df61957938586c512c17e72d83551d190400981 (diff)
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Merge branch 'next' of /home/wd/git/u-boot/next
Conflicts: include/ppc4xx.h Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/configs/zeus.h')
-rw-r--r--include/configs/zeus.h22
1 files changed, 13 insertions, 9 deletions
diff --git a/include/configs/zeus.h b/include/configs/zeus.h
index 29ada9e..aa250cc 100644
--- a/include/configs/zeus.h
+++ b/include/configs/zeus.h
@@ -122,14 +122,18 @@
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
-#define CONFIG_SYS_BASE_BAUD 691200
+#define CONFIG_SYS_BASE_BAUD 691200
#define CONFIG_BAUDRATE 115200
#define CONFIG_SERIAL_MULTI
-/* The following table includes the supported baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE \
- {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
/*-----------------------------------------------------------------------
* Miscellaneous configurable options
@@ -280,12 +284,12 @@
* GPIO0[28-29] - UART1 data signal input/output
* GPIO0[30-31] - EMAC0 and EMAC1 reject packet inputs
*/
-#define CONFIG_SYS_GPIO0_OSRH 0x15555550 /* Chip selects */
-#define CONFIG_SYS_GPIO0_OSRL 0x00000110 /* UART_DTR-pin 27 alt out */
-#define CONFIG_SYS_GPIO0_ISR1H 0x10000041 /* Pin 2, 12 is input */
-#define CONFIG_SYS_GPIO0_ISR1L 0x15505440 /* OUT: LEDs 22/23; IN: pin12,2, NVALID# */
-#define CONFIG_SYS_GPIO0_TSRH 0x00000000
+#define CONFIG_SYS_GPIO0_OSRL 0x15555550 /* Chip selects */
+#define CONFIG_SYS_GPIO0_OSRH 0x00000110 /* UART_DTR-pin 27 alt out */
+#define CONFIG_SYS_GPIO0_ISR1L 0x10000041 /* Pin 2, 12 is input */
+#define CONFIG_SYS_GPIO0_ISR1H 0x15505440 /* OUT: LEDs 22/23; IN: pin12,2, NVALID# */
#define CONFIG_SYS_GPIO0_TSRL 0x00000000
+#define CONFIG_SYS_GPIO0_TSRH 0x00000000
#define CONFIG_SYS_GPIO0_TCR 0xBFF68317 /* 3-state OUT: 22/23/29; 12,2 is not 3-state */
#define CONFIG_SYS_GPIO0_ODR 0x00000000