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| author | Wolfgang Denk <wd@denx.de> | 2009-12-15 23:38:34 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-12-15 23:38:34 +0100 |
| commit | bb3bcfa2426cc6a0aecec7270e3ee67ca843a125 (patch) | |
| tree | 0314e3d8e8d9e4d568a496fca27db33d66e68bb4 /include/configs/yucca.h | |
| parent | a200a7c04d89853d2a1395b96d8ca5e3dd754551 (diff) | |
| parent | 4b142febff71eabdb7ddbb125c7b583b24ddc434 (diff) | |
| download | u-boot-imx-bb3bcfa2426cc6a0aecec7270e3ee67ca843a125.zip u-boot-imx-bb3bcfa2426cc6a0aecec7270e3ee67ca843a125.tar.gz u-boot-imx-bb3bcfa2426cc6a0aecec7270e3ee67ca843a125.tar.bz2 | |
Merge branch 'next' of ../next
Diffstat (limited to 'include/configs/yucca.h')
| -rw-r--r-- | include/configs/yucca.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/configs/yucca.h b/include/configs/yucca.h index b165bd7..42f8807 100644 --- a/include/configs/yucca.h +++ b/include/configs/yucca.h @@ -389,6 +389,11 @@ #define FPGA_REG1A_PE_SELSOURCE_0 0x0002 #define FPGA_REG1A_PE_SELSOURCE_1 0x0001 +#define FPGA_REG1A_GLED_ENCODE(n) (FPGA_REG1A_PE0_GLED >> (n)) +#define FPGA_REG1A_YLED_ENCODE(n) (FPGA_REG1A_PE0_YLED >> (n)) +#define FPGA_REG1A_PWRON_ENCODE(n) (FPGA_REG1A_PE0_PWRON >> (n)) +#define FPGA_REG1A_REFCLK_ENCODE(n) (FPGA_REG1A_PE0_REFCLK_ENABLE >> (n)) + /*----------------------------------------------------------------------------+ | PCIe Miscellaneous +----------------------------------------------------------------------------*/ @@ -407,6 +412,9 @@ #define FPGA_REG1C_PE1_PERST 0x0008 #define FPGA_REG1C_PE2_PERST 0x0004 +#define FPGA_REG1C_ROOTPOINT_ENCODE(n) (FPGA_REG1C_PE0_ROOTPOINT >> (n)) +#define FPGA_REG1C_PERST_ENCODE(n) (FPGA_REG1C_PE0_PERST >> (n)) + /*----------------------------------------------------------------------------+ | Defines +----------------------------------------------------------------------------*/ |