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author | Wolfgang Denk <wd@denx.de> | 2010-11-12 22:24:06 +0100 |
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committer | Wolfgang Denk <wd@denx.de> | 2010-11-12 22:24:06 +0100 |
commit | d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0 (patch) | |
tree | 07dd5889d73f4b66ad608815adcf6f2f953d9501 /include/configs/xaeniax.h | |
parent | 66fca016057b1c6b697552cc7220ebada9d4f82d (diff) | |
parent | 0c0892be0d93a5a892b93739c5eb3bf692fed4ff (diff) | |
download | u-boot-imx-d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0.zip u-boot-imx-d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0.tar.gz u-boot-imx-d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0.tar.bz2 |
Merge branch 'master' of /home/wd/git/u-boot/master
Diffstat (limited to 'include/configs/xaeniax.h')
-rw-r--r-- | include/configs/xaeniax.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h index 67d4106..a75c426 100644 --- a/include/configs/xaeniax.h +++ b/include/configs/xaeniax.h @@ -42,6 +42,7 @@ */ #define CONFIG_PXA250 1 /* This is an PXA255 CPU */ #define CONFIG_XAENIAX 1 /* on a xaeniax board */ +#define CONFIG_SYS_TEXT_BASE 0x0 #define BOARD_LATE_INIT 1 @@ -114,7 +115,6 @@ * used for the RAM copy of the uboot code */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* * Miscellaneous configurable options @@ -168,7 +168,7 @@ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1) /* * FLASH and environment organization @@ -437,8 +437,9 @@ */ #define CONFIG_SYS_PSSR_VAL 0x00000030 -#define CONFIG_SYS_CKEN_VAL 0x00000080 /* */ -#define CONFIG_SYS_ICMR_VAL 0x00000000 /* No interrupts enabled */ +#define CONFIG_SYS_CKEN 0x00000080 /* */ +#define CONFIG_SYS_ICMR 0x00000000 /* No interrupts enabled */ +#define CONFIG_SYS_CCCR CCCR_L27|CCCR_M2|CCCR_N10 /* @@ -562,6 +563,9 @@ */ #define CONFIG_SYS_MDMRS_VAL 0x00320032 +#define CONFIG_SYS_FLYCNFG_VAL 0x00000000 +#define CONFIG_SYS_SXCNFG_VAL 0x00000000 + /* * PCMCIA and CF Interfaces */ |