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authorLinus Walleij <linus.walleij@linaro.org>2015-03-09 10:53:21 +0100
committerTom Rini <trini@konsulko.com>2015-03-09 11:13:29 -0400
commit23b5877c64562a314f8d8c60d0066cd346f2d886 (patch)
tree637ae686c8cda5a7c7d28216bf7d4c1f79f0f945 /include/configs/vexpress_aemv8a.h
parent671fa63e79053c33456c198c1e0f74262b0b2548 (diff)
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armv8/vexpress64: make multientry conditional
While the Freescale ARMv8 board LS2085A will enter U-Boot both on a master and a secondary (slave) CPU, this is not the common behaviour on ARMv8 platforms. The norm is that U-Boot is entered from the master CPU only, while the other CPUs are kept in WFI (wait for interrupt) state. The code determining which CPU we are running on is using the MPIDR register, but the definition of that register varies with platform to some extent, and handling multi-cluster platforms (such as the Juno) will become cumbersome. It is better to only enable the multiple entry code on machines that actually need it and disable it by default. Make the single entry default and add a special ARMV8_MULTIENTRY KConfig option to be used by the platforms that need multientry and set it for the LS2085A. Delete all use of the CPU_RELEASE_ADDR from the Vexpress64 boards as it is just totally unused and misleading, and make it conditional in the generic start.S code. This makes the Juno platform start U-Boot properly. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include/configs/vexpress_aemv8a.h')
-rw-r--r--include/configs/vexpress_aemv8a.h7
1 files changed, 0 insertions, 7 deletions
diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
index e6cd881..810eef1 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -54,13 +54,6 @@
/* Flat Device Tree Definitions */
#define CONFIG_OF_LIBFDT
-/* SMP Spin Table Definitions */
-#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
-#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
-#else
-#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
-#endif
-
/* CS register bases for the original memory map. */
#define V2M_PA_CS0 0x00000000
#define V2M_PA_CS1 0x14000000